VERTICALLY FORMED INDUCTOR AND ELECTRONIC DEVICE HAVING THE SAME

• US 20080297299A1
• Filed: 03/24/2008
• Published: 12/04/2008
• Est. Priority Date: 05/31/2007
• Status: Active Grant

• Current Assignee: Electronics and Telecommunications Research Institute
• Original Assignee: Electronics and Telecommunications Research Institute
• Inventors: Moon, Jong Tae, Choi, Kwang Seong, Yun, Ho Gyeong
• Granted Patent: US 7,733,207 B2
• Time in Patent Office: Days
• US Class Current: 336/200
• CPC Class Codes: H01F 17/0013 with stacked layers
• CPC Class Codes: H01F 17/0033 with the coil helically wound around a magnetic core
• CPC Class Codes: H01F 2017/002 Details of via holes for interconnecting the layers
• CPC Class Codes: H01F 2017/0073 with a special conductive pattern, e.g. flat spiral
• CPC Class Codes: H01F 27/34 Special means for preventing or reducing unwanted electric or magnetic effects, e.g. no-load losses, reactive currents, harmonics, oscillations, leakage fields

Abstract

Provided are an inductor, which is vertically formed, and an electronic device having the inductor, and more particularly, an inductor capable of minimizing loss of a surface area and accomplishing high efficiency impedance by vertically forming the inductor in a plurality of insulating layers, and an electronic device having the same. The inductor includes a plurality of conductive lines disposed in the insulating layers; and vias vertically formed in the insulating layers to electrically connect the plurality of conductive lines. When a board or an electronic device including an inductor proposed by the present invention is manufactured, the inductor can occupy a minimum area in the electronic device or board while providing high inductance. In particular, the surface area of the electronic device or board occupied by the inductor can be remarkably decreased to reduce manufacturing costs.

Claims

1. An inductor, which is vertically disposed in a plurality of insulating layers formed on a substrate, comprising:

a plurality of first conductive lines disposed in the insulating layers; and

vias vertically formed in the insulating layers to electrically connect the plurality of first conductive lines.

2. The inductor according to claim 1, wherein the plurality of first conductive lines and the vias are connected in a spiral shape.

3. The inductor according to claim 1, wherein the plurality of first conductive lines and the vias are connected in a meander shape.

4. The inductor according to claim 1, further comprising:

at least one second conductive line electrically connected to the plurality of first conductive lines and the vias, and disposed on an uppermost surface of the insulating layers.

5. An electronic device comprising:

a plurality of insulating layers formed on a substrate; and

an inductor vertically disposed in the plurality of insulating layers,

wherein the inductor comprises a plurality of first conductive lines disposed in the insulating layers, and vias vertically formed in the insulating layers to electrically connect the plurality of first conductive lines.

6. The electronic device according to claim 5, wherein the plurality of first conductive lines and the vias are connected in a spiral shape.

7. The electronic device according to claim 5, wherein the plurality of first conductive lines and the vias are connected in a meander shape.

8. The electronic device according to claim 5, further comprising:

at least one second conductive line electrically connected to the plurality of first conductive lines and the vias, and disposed on an uppermost surface of the insulating layers.