METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

• US 20080299758A1
• Filed: 06/03/2008
• Published: 12/04/2008
• Est. Priority Date: 06/04/2007
• Status: Active Grant

• Current Assignee: Pannova Semic, LLC (Vector Capital Corporation)
• Original Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Inventors: Harada, Takeshi, Shibata, Junichi, Ueki, Akira
• Granted Patent: US 8,084,352 B2
• Time in Patent Office: Days
• US Class Current: 438/619
• CPC Class Codes: H01L 21/7682 the dielectric comprising air gaps
• CPC Class Codes: H01L 21/76832 Multiple layers
• CPC Class Codes: H01L 21/76834 formation of thin insulating films on the sidewalls or on top of conductors H01L21/76831 takes precedence
• CPC Class Codes: H01L 21/76849 the layer being positioned on top of the main fill metal
• CPC Class Codes: H01L 21/7685 the layer covering a conductive structure H01L21/76849 takes precedence
• CPC Class Codes: H01L 21/76852 the layer also covering the sidewalls of the conductive structure
• CPC Class Codes: H01L 2221/1078 Multiple stacked thin films not being formed in openings in dielectrics
• CPC Class Codes: H01L 23/5222 Capacitive arrangements or effects of, or between wiring layers other capacitive arrangements H01L23/642
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A high-density N-type diffusion layer 116 formed in a separation area 115 makes it possible to reduce a collector current flowing through a parasitic NPN transistor 102. Thus, a normal CMOS process can be used to provide a driving circuit and a data line driver which make it possible to improve resistance to possible noise occurring between adjacent terminals, while controlling a chip size.

Claims

1. A method of manufacturing a semiconductor device having at least one wiring layer formed therein and an air gap formed in any wiring layer area to reduce inter-wire capacity, the method comprising the steps of:

when forming the wiring layer in which the air gap is formed,

forming a first insulating film on a semiconductor substrate or a lower wiring layer;

forming a plurality of wires in an upper part of the first insulating film;

forming a first cap film on the wires;

forming a mask pattern on an air gap non-forming area of the first insulating film and the first cap film;

at least partly etching the first cap film and the first insulating film in an air gap forming area through the mask pattern as a mask to form a gap;

removing the mask pattern;

forming a second cap film on the first cap film in the air gap forming area; and

depositing a second insulating film on the gap, the first cap film, and the second cap film to form the air gap from the gap in the air gap forming area.

2. The method of manufacturing the semiconductor device according to claim 1, wherein in the step of forming the gap, all of the first cap film is etched.

5. The method of manufacturing the semiconductor device according to claim 1, wherein the first cap film and the second cap film are formed of the same material.

6. The method of manufacturing the semiconductor device according to claim 1, wherein the first cap film and the second cap film are formed of different materials.

14. The method of manufacturing the semiconductor device according to claim 1, wherein the wires contain a copper film or a copper alloy film.

16. The method of manufacturing the semiconductor device according to claim 1, wherein each of the first cap film and the second cap film is any of a Co film, a Co alloy film, an Ni film, an Ni alloy film, a W film, a W alloy film, and a Cu alloy film.

18. The method of manufacturing the semiconductor device according to claim 1, wherein the first insulating film is any of an SiO₂ film, an SiOC film, an SiOF film, a BCB film, and an SiLK film.

3. A method of manufacturing a semiconductor device having at least one wiring layer formed therein and an air gap formed in any wiring layer area to reduce inter-wire capacity, the method comprising the steps of:

when forming the wiring layer in which the air gap is formed,

forming a first insulating film on a semiconductor substrate or a lower wiring layer;

forming a plurality of wires in an upper part of the first insulating film;

forming a liner film on the first insulating film and the wires;

forming a mask pattern on an air gap non-forming area of the liner film;

etching away the liner film on an air gap forming area through the mask pattern as a mask;

at least partly etching the first insulating film in the air gap forming area through the mask pattern as a mask to form a gap;

removing the mask pattern;

forming a second cap film on the wires in the air gap forming area; and

depositing a second insulating film on the gap, the liner film, and the second cap film to form the air gap from the gap in the air gap forming area.

4. The method of manufacturing the semiconductor device according to claim 3, further comprising a step of forming a first cap film on the wires before the step of forming the liner film, wherein in the step of forming the gap, the first cap film is also etched.

7. The method of manufacturing the semiconductor device according to claim 3, further comprising a step of depositing, on the liner film, a wetting film having higher hydrophilicity than the liner film before the step of forming the mask pattern, wherein in the step of etching away the liner film, the wetting film is also removed through the mask pattern as a mask, and in the step of forming the air gap, the second insulating film is deposited on the gap, the wetting film, and the second cap film.

8. The method of manufacturing the semiconductor device according to claim 7, further comprising a step of forming a first cap film on the wires between the step of forming the wires and the step of forming the liner film, wherein in the step of etching away the liner film, the first cap film is also removed through the mask pattern as a mask.

9. The method of manufacturing the semiconductor device according to claim 7, wherein the wetting film comprises SiO₂ as a main component.

10. The method of manufacturing the semiconductor device according to claim 3, wherein the liner film is any of an SiC film, an SiCO film, an SiCN film, an SiC film, an SiN film, and an SiON film or a film stack of any of the films.

11. A method of manufacturing a semiconductor device having at least one wiring layer formed therein and an air gap formed in any wiring layer area to reduce inter-wire capacity, the method comprising the steps of:

when forming the wiring layer in which the air gap is formed,

forming a first insulating film on a semiconductor substrate or a lower wiring layer;

forming a plurality of wires each comprising a metal film and a barrier metal film, on the first insulating film;

forming a mask pattern on an air gap non-forming area of the first insulating film;

at least partly etching the barrier metal film and the first insulating film in an air gap forming area through the mask pattern as a mask to form a gap;

removing the mask pattern;

forming a second cap film in an upper part of and on a side wall portion of the metal film in the air gap forming area; and

depositing a second insulating film on the gap and the second cap film to form the air gap from the gap in the air gap forming area.

12. The method of manufacturing the semiconductor device according to claim 11, further comprising a step of forming a first cap film on the wires between the step of forming the wires and the step of forming the mask pattern, wherein in the step of forming the gap, the first cap film is etched through the mask pattern as a mask.

13. The method of manufacturing the semiconductor device according to claim 11, wherein the metal film contains a copper film or a copper alloy film.

15. The method of manufacturing the semiconductor device according to claim 11, wherein the wires contain a copper film or a copper alloy film.

17. The method of manufacturing the semiconductor device according to claim 12, wherein each of the first cap film and the second cap film is any of a Co film, a Co alloy film, an Ni film, an Ni alloy film, a W film, a W alloy film, and a Cu alloy film.

19. The method of manufacturing the semiconductor device according to claim 11, wherein the first insulating film is any of an SiO₂ film, an SiOC film, an SiOF film, a BCB film, and an SiLK film.