Performance Analysis Based System Level Power Management
First Claim
1. A method of dynamic adaptive power management in multiprocessor system-on-chip comprising:
- building a resource requirements table that tabulates tasks in an application program according to their performance requirements and resource power levels available in a multiprocessor system with power management controls, also the various operating voltages of the different cores and also the current running voltage level of the cores;
during a static phase, uploading resource requirements to said table;
during a dynamic phase, collecting information from a plurality of strategically placed performance counters, extracting dynamic performance requirements, and updating corresponding entries in said table;
consulting said table and using a power manager to set corresponding power levels to system resources scheduled for respective tasks.
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Abstract
A multiprocessor system-on-chip 102 with dynamic adaptive power management for execution of data-dependent applications comprises strategically placed performance counters to collect run-time performance requirements of tasks. A power manager 130 issues DVS 132, DFS 134, time-out 136, and other controls to the various system resources being monitored. As the tasks execute during run-time, the quality of the match between the task and the resource it was scheduled to is analyzed. More accurate power controls and schedules are then made available and stored in a performance requirements table. The power-management is therefore adaptive and dynamic. During a static analysis phase, applications and tasks that can be pre-characterized for their performance requirements are profiled and pre-loaded as initial starting points for correction during run-time.
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Citations
9 Claims
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1. A method of dynamic adaptive power management in multiprocessor system-on-chip comprising:
- building a resource requirements table that tabulates tasks in an application program according to their performance requirements and resource power levels available in a multiprocessor system with power management controls, also the various operating voltages of the different cores and also the current running voltage level of the cores;
during a static phase, uploading resource requirements to said table;
during a dynamic phase, collecting information from a plurality of strategically placed performance counters, extracting dynamic performance requirements, and updating corresponding entries in said table;
consulting said table and using a power manager to set corresponding power levels to system resources scheduled for respective tasks. - View Dependent Claims (2, 3, 4)
- building a resource requirements table that tabulates tasks in an application program according to their performance requirements and resource power levels available in a multiprocessor system with power management controls, also the various operating voltages of the different cores and also the current running voltage level of the cores;
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5. A multiprocessor system-on-chip (SoC) with dynamic adaptive power management for execution of data-dependent applications, characterized by:
- a plurality of performance counters with individual ones disposed in each processor each periphera, and an interconnecting internal system bus of a multiprocessor system implemented in a system-on-chip;
a resource requirements table that maps the performance levels required for a scheduled resource by a task in an application;
power manager for controlling at least one of DVS, DFS, and timeout to respective system resources associated with each of the performance counters, and that during run-time consults the resource requirements table for appropriate power management settings;
a static process for pre-loading the resource requirements table with performance requirements for a list of known applications and uses; and
a dynamic process for updating entries in the resource requirements table with performance requirements that have been extracted during run-time from data collected from the plurality performance c wherein, the power manager issues such controls as are necessary to optimize power at the system-level and such controls are dynamic and adaptive to changing conditions in the application that cannot be predicted before run-time. - View Dependent Claims (6, 7, 8)
- a plurality of performance counters with individual ones disposed in each processor each periphera, and an interconnecting internal system bus of a multiprocessor system implemented in a system-on-chip;
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9. A prediction model for predicting the dynamic performance of application tasks that uses performance c and tabulates appropriate power requirements, and a power manager for dynamically using such tabulated information for on-line power management done at run-time, and such that the power management adapts to different input data and new applications while meeting each task'"'"'s performance requirements.
Specification