Flexible and elastic dielectric integrated circuit
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Abstract
General purpose methods for the fabrication of integrated circuits from flexible membranes formed of very thin low stress dielectric materials, such as silicon dioxide or silicon nitride, and semiconductor layers. Semiconductor devices are formed in a semiconductor layer of the membrane. The semiconductor membrane layer is initially formed from a substrate of standard thickness, and all but a thin surface layer of the substrate is then etched or polished away. In another version, the flexible membrane is used as support and electrical interconnect for conventional integrated circuit die bonded thereto, with the interconnect formed in multiple layers in the membrane. Multiple die can be connected to one such membrane, which is then packaged as a multi-chip module. Other applications are based on (circuit) membrane processing for bipolar and MOSFET transistor fabrication, low impedance conductor interconnecting fabrication, flat panel displays, maskless (direct write) lithography, and 3D IC fabrication.
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Citations
113 Claims
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1-76. -76. (canceled)
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77. A circuit interconnect comprising:
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a substrate; at least one of a stress-controlled dielectric layer, a low stress dielectric layer, a flexible dielectric layer and an elastic dielectric layer overlying the substrate; and a plurality of interconnect conductors formed within the at least one of the stress-controlled dielectric layer, the low stress dielectric layer, the flexible dielectric layer and the elastic dielectric layer. - View Dependent Claims (78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94)
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95. An electric interconnect structure for interconnecting the active regions of transistors formed in a semiconductor substrate and passive regions so as to form an integrated circuit, said interconnect structure comprising:
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at least one of a stress-controlled dielectric layer, a low stress dielectric layer, a flexible dielectric layer and an elastic dielectric layer overlying the substrate; and at least one layer of electrical conductors formed on or directly adjacent to at least one of the stress-controlled dielectric layer, the low stress dielectric layer, the flexible dielectric layer and the elastic dielectric layer. - View Dependent Claims (96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 113)
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Specification