Transistor Manufacture

• US 20080305602A1
• Filed: 04/18/2006
• Published: 12/11/2008
• Est. Priority Date: 04/18/2005
• Status: Active Grant

• Current Assignee: X-FAB Semiconductor Foundries AG (X-FAB Silicon Foundries SE)
• Original Assignee: X-FAB Semiconductor Foundries AG (X-FAB Silicon Foundries SE)
• Inventors: Fu, Jun
• Granted Patent: US 7,935,606 B2
• Time in Patent Office: Days
• US Class Current: 438/312
• CPC Class Codes: H01L 29/66242 Heterojunction transistors [HBT] with an active layer made of a group 13/15 material H01L29/66318
• CPC Class Codes: H01L 29/66287 with a single crystalline emitter, collector or base including extrinsic, link or graft base formed on the silicon substrate, e.g. by epitaxy, recrystallisation, after insulating device isolation H01L29/6628 takes precedence

Abstract

An oxide layer is formed on material defining and surrounding an emitter window. The technique comprises depositing a non-conformal oxide layer on the surrounding material and in the emitter window, whereby the thickness of at least a portion of the oxide layer in the emitter window is smaller than the thickness of the oxide layer on the surrounding material outside the emitter window; and removing at least a portion of the oxide layer in the emitter window so as to reveal at least a portion of the bottom of the emitter window whilst permitting at least a portion of the oxide layer to remain on the surrounding material. The technique can be used in the manufacture of a self-aligned epitaxial base BJT (bipolar junction transistor) or SiGe HBT (hetero junction bipolar transistor).

Claims

1. A method of forming an oxide layer on material defining and surrounding an emitter window, comprising:

depositing a non-conformal oxide layer on said surrounding material and in said emitter window, whereby the thickness of at least a portion of the oxide layer in the emitter window is smaller than the thickness of the oxide layer on said surrounding material outside said emitter window; and

removing at least a portion of said oxide layer in said emitter window so as to reveal at least a portion of the bottom of said emitter window whilst permitting at least a portion of said oxide layer to remain on said surrounding material.

2. A method according to claim 1, wherein after deposition of the oxide layer the thickness of the oxide layer over at least a portion of the bottom of the emitter window is smaller than the thickness of the oxide layer on said surrounding material.

3. A method according to claim 2, wherein the thickness of the oxide layer over substantially the entire bottom of the emitter window is smaller than the thickness of the oxide layer on said surrounding material.

4. A method according to claim 1, wherein after deposition of the oxide layer the thickness of the oxide layer on said surrounding material is 50 to 300% greater than the thickness of the oxide layer over said portion of the bottom of the emitter window.

5. A method according to claim 1, wherein the thickness of the oxide layer over said portion of the bottom of the emitter window is between 50 and 150 nm.

6. A method according to claim 1, wherein after deposition of the oxide layer the thickness of the oxide layer on said surrounding material is between 200 and 300 nm.

7. A method according to claim 1, wherein after removal of said portion of said oxide layer in said emitter window the thickness of the oxide layer remaining on said surrounding material is at least 50 nm.

8. A method according claim 1, wherein removing at least said portion of said oxide layer in the emitter window comprises etching said oxide layer.

9. A method according to claim 1, further comprising forming at least one nitride side wall spacer in said emitter window.

10. A method according to claim 9, comprising forming two nitride side wall spacers in said emitter window, and wherein removing at least said portion of said oxide layer in said emitter window comprises removing substantially all of said oxide layer over an area of said bottom of said emitter window which is not covered by said nitride side wall spacers.

11. A method according to claim 1, further comprising forming at least a portion of an emitter in said emitter window.

12. A method according to claim 1, wherein said oxide layer comprises a silicon oxide layer.

13. A method according to claim 1, comprising also removing a portion of the oxide layer on said surrounding material at substantially the same rate at which the oxide layer in said emitter window is removed.

14. A method according to claim 1 wherein said depositing and removing steps are carried out to manufacture a bipolar junction transistor or a hetero junction bipolar transistor.

15. A semiconductor processing apparatus for forming an oxide layer on material defining and surrounding an emitter window, comprising:

a depositor configured to deposit a non-conformal oxide layer on said surrounding material and in said emitter window, whereby the thickness of at least a portion of the oxide layer in the emitter window is smaller than the thickness of the oxide layer on said surrounding material outside said emitter window; and

a remover configured to remove at least a portion of said oxide layer in said emitter window so as to reveal at least a portion of the bottom of said emitter window whilst permitting at least a portion of said oxide layer to remain on said surrounding material.