SEMICONDUCTOR DEVICES AND ELECTRONIC SYSTEMS COMPRISING FLOATING GATE TRANSISTORS AND METHODS OF FORMING THE SAME
First Claim
1. A semiconductor device having at least one transistor comprising:
- a source;
a drain;
a control gate; and
a floating gate comprising;
a first end portion proximate the source and the drain;
a second end portion proximate the control gate; and
an intermediate portion extending between the first end portion and the second end portion, the intermediate portion having an average cross-sectional area less than at least one of an average cross-sectional area of the first end portion and an average cross-sectional area of the second end portion.
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Accused Products
Abstract
Semiconductor devices include one or more transistors having a floating gate and a control gate. In at least one embodiment, the floating gate comprises an intermediate portion extending between two end portions. The intermediate portion has an average cross-sectional area less than one or both of the end portions. In some embodiments, the intermediate portion may comprise a single nanowire. In additional embodiments, semiconductor devices have one or more transistors having a control gate and a floating gate in which a surface of the control gate opposes a lateral side surface of a floating gate that defines a recess in the floating gate. Electronic systems include such semiconductor devices. Methods of forming semiconductor devices include, for example, forming a floating gate having an intermediate portion extending between two end portions, and configuring the intermediate portion to have an average cross-sectional area less than one or both of the end portions.
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Citations
42 Claims
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1. A semiconductor device having at least one transistor comprising:
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a source; a drain; a control gate; and a floating gate comprising; a first end portion proximate the source and the drain; a second end portion proximate the control gate; and an intermediate portion extending between the first end portion and the second end portion, the intermediate portion having an average cross-sectional area less than at least one of an average cross-sectional area of the first end portion and an average cross-sectional area of the second end portion. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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- 15. A semiconductor device having at least one transistor comprising an electrically isolated floating gate and a control gate capacitively coupled with the floating gate, the control gate having at least one surface opposing an upper surface of an end portion of the floating gate and at least one surface opposing a lateral side surface of the floating gate, the lateral side surface of the floating gate defining a recess in the floating gate.
- 20. A semiconductor device having at least one transistor comprising an electrically isolated floating gate and a control gate capacitively coupled with the floating gate, the floating gate comprising a single nanowire extending between a first end portion of the floating gate and a second end portion of the floating gate, the control gate disposed at least partially over and around the second end portion of the floating gate and at least partially around a portion of the single nanowire.
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25. An electronic system comprising:
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at least one electronic signal processor; at least one semiconductor device configured to communicate electrically with the at least one electronic signal processor; and at least one of an input device and an output device configured to communicate electrically with the at least one electronic signal processor, at least one of the at least one electronic signal processor and the at least one semiconductor device having at least one transistor comprising an electrically isolated floating gate and a control gate capacitively coupled with the floating gate, the control gate having at least one surface opposing an upper surface of a end portion of the floating gate and at least one surface opposing a lateral side surface of the floating gate, the lateral side surface of the floating gate defining a recess in the floating gate. - View Dependent Claims (26, 27, 28, 29, 30, 31, 32)
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33. An electronic system comprising:
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at least one electronic signal processor; at least one semiconductor device configured to communicate electrically with the at least one electronic signal processor; and at least one of an input device and an output device configured to communicate electrically with the at least one electronic signal processor, at least one of the at least one electronic signal processor and the at least one semiconductor device having at least one transistor comprising an electrically isolated floating gate and a control gate capacitively coupled with the floating gate, the floating gate comprising a single nanowire extending between a first end portion of the floating gate and a second end portion of the floating gate, the control gate disposed at least partially over and around the second end portion of the floating gate and at least partially around a portion of the singe nanowire. - View Dependent Claims (34, 35)
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36. A method of forming a semiconductor device having at least one transistor, comprising:
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forming a floating gate having a first end portion, a second end portion, and an intermediate portion extending between the first end portion and the second end portion, wherein the intermediate portion has an average cross-sectional area less than at least one of an average cross-sectional area of the first end portion and an average cross-sectional area of the second end portion; and forming a control gate at least partially over and around at least the second end portion of the floating gate. - View Dependent Claims (37, 38, 39, 40, 41, 42)
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Specification