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OUTPUT QUEUED SWITCH WITH A PARALLEL SHARED MEMORY, AND METHOD OF OPERATING SAME

  • US 20080310418A1
  • Filed: 08/26/2008
  • Published: 12/18/2008
  • Est. Priority Date: 11/29/2000
  • Status: Active Grant
First Claim
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1. A network switch, comprising:

  • an input layer including N input circuits each coupled to an input port and having N buffers therein corresponding to N output terminals;

    an intermediate layer including N intermediate circuits each having N input terminals and N output terminals, where a first output terminal of each input circuit is coupled to a first intermediate circuit and an Nth output terminal of each input circuit is coupled to a Kth intermediate circuit, where K={1, 2, . . . N}; and

    an output layer including N output circuits each having N input terminals and an output port, where a first output terminal of each intermediate circuit is coupled to a first output circuit and an Nth output terminal of each intermediate circuit is coupled to an Lth output circuit, where L={1, 2, . . . N}.

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