MICROWAVE INTEGRATED CIRCUIT PACKAGE AND METHOD FOR FORMING SUCH PACKAGE

• US 20080311682A1
• Filed: 03/20/2008
• Published: 12/18/2008
• Est. Priority Date: 06/14/2007
• Status: Active Grant

• Current Assignee: Raytheon Company (Rtx Corporation)
• Original Assignee: Raytheon Company (Rtx Corporation)
• Inventors: Colomb, Francois Y., Adlerstein, Michael G.
• Granted Patent: US 7,968,978 B2
• Time in Patent Office: Days
• US Class Current: 438/3
• CPC Class Codes: H01L 23/552 Protection against radiation, e.g. light or electromagnetic waves
• CPC Class Codes: H01L 23/66 High-frequency adaptations
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/1617 Cavity coating
• CPC Class Codes: H01L 2924/16195 Flat cap [not enclosing an internal cavity]
• CPC Class Codes: H01L 2924/16235 Connecting to a semiconductor or solid-state bodies, i.e. cap-to-chip

Abstract

A method for packaging a semiconductor device. The method includes: providing a dielectric layer over the semiconductor device; determining patterns and placement of material on the dielectric layer to provide a predetermined magnetic or electric effect for the device, such effects being provided on the device from such patterned and placed material solely by electrical or magnetic waves coupled between such material and the device; and forming the material in the determined patterns and placement to provide the predetermined effects.

Claims

1. A method for packaging a semiconductor device, such method comprising:

providing a dielectric layer over the semiconductor device;

determining patterns and placement of material on the dielectric layer to provide a predetermined magnetic or electric effect for the device, such effects being provided on the device from such patterned and placed material solely by electrical or magnetic waves coupled between such material and the device; and

forming the material in the determined patterns and placement to provide the predetermined effects.

2. The method recited in claim 1 wherein the dielectric layer is a rigid dielectric layer suspended over the device.

3. A package for a semiconductor device, comprising:

a dielectric layer disposed over the semiconductor device; and

magnetic material disposed on selected regions of the rigid dielectric layer.

4. The package recited in claim 3 wherein the dielectric layer is a rigid dielectric layer suspended over the device.

5. A method for packaging a semiconductor device, such method comprising:

using a computer model of a package with a microwave integrated circuit therein to generate electromagnetic simulations of the package and the circuit therein to define a baseline performance for the package and the circuit therein;

applying a plurality of different electromagnetic structures to the package and the circuit therein, to provide to provide a predetermined magnetic or electric effect for the device, such effects being provided on the device from such patterned and placed material solely by electrical or magnetic waves coupled between such material and the device;

performing a simulation for each one of the plurality of different electromagnetic structures measuring one or more of the following performance factors;

feedback, radiation leakage, and gain;

comparing the simulated performance with the baseline performance; and

,

selecting one of the plurality of different electromagnetic structures.

6. The method recited in claim 5 wherein the structures for the package include resistive, metallic, magnetic or dielectric material.

7. A method for packaging a plurality of semiconductor devices formed in a surface portion of a semiconductor wafer, each one of a plurality of regions within the wafer having one of the semiconductor devices therein, such method comprising:

providing a dielectric layer over the wafer;

depositing a material on the dielectric layer, such material effecting electromagnetic fields on each one of the devices;

separating each one of the devices within the wafer.

8. The method recited in claim 7 wherein the dielectric layer is a ridged dielectric layer with portions thereof suspended over the devices.

9. The method recited in claim 7 wherein the material is magnetic material.

10. The method recited in claim 9 wherein the material is metal.