SYSTEM AND METHOD FOR ESTIMATING INPUT POWER FOR A POWER PROCESSING CIRCUIT

• US 20080316779A1
• Filed: 12/13/2007
• Published: 12/25/2008
• Est. Priority Date: 06/19/2007
• Status: Abandoned Application

• Current Assignee: MyPAQ Holdings Ltd. (Transpacific IP Group Limited)
• Original Assignee: MyPAQ Holdings Ltd. (Transpacific IP Group Limited)
• Inventors: Gugle, Prashant, Jayaraman, Chandrasekaran
• Application Number:
  US11/955,627
• Publication Number:
  US 20080316779A1
• Time in Patent Office: Days
• US Class Current: 363/74
• CPC Class Codes: G01R 21/133 by using digital technique
• CPC Class Codes: H02M 1/4225 using a non-isolated boost converter
• CPC Class Codes: H02M 3/156 with automatic control of output voltage or current, e.g. switching regulators
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

A controller for a power processing circuit and a related method of operating the same. In one embodiment, the controller includes a multiplier configured to produce a product of an input current and an input voltage of the power processing circuit. The controller also includes a low-pass filter configured to produce an input power estimate of an input power to the power processing circuit as a function of the product of the input current and the input voltage. In another embodiment, the controller is a power-factor controller and includes a voltage loop compensator configured to produce a voltage compensation signal as a function of an output voltage of the power processing circuit. The controller also includes an input power estimator configured to produce an input power estimate of an input power to the power processing circuit as a function of the voltage compensation signal.

Claims

1. A controller for use with an electrical system, comprising:

a multiplier configured to produce a product of an input current and an input voltage of said power processing circuit; and

a low-pass filter configured to produce an input power estimate of an input power to said power processing circuit as a function of said product of said input current and said input voltage.

2. The controller as recited in claim 1 further comprising a conversion unit configured to perform a correction of said input power estimate.

3. The controller as recited in claim 2 wherein said conversion unit is calibrated over a range of power converter operating conditions during a manufacturing step to improve accuracy of said input power estimate.

4. The controller as recited in claim 1 wherein said multiplier and said low-pass filter comprise a digital circuit.

5. The controller as recited in claim 1 wherein said input current is a scaled, digitized input current of a boost power stage of said power processing circuit and said input voltage is a scaled, digitized input voltage.

6. The controller as recited in claim 1 further comprising a pulse-width modulator configured to produce a signal to control a duty cycle of a boost power switch in a boost power stage of said power processing circuit.

7. The controller as recited in claim 1, further comprising:

a voltage loop compensator configured to produce a voltage compensation signal as a function of a first error signal derived from a scaled, digitized output voltage of a boost power stage of said power processing subtracted from a reference output voltage;

a multiplier configured to produce a time-dependent current reference signal as a function of a voltage feed-forward signal derived from a scaled, digitized input voltage via a feedback circuit and said voltage compensation signal;

a summer configured to produce a second error signal as a function of a current feedback signal derived from a scaled, digitized inductor current of a boost power stage of said power processing circuit and said time-dependent current reference signal;

a current loop compensator configured to produce a current compensation signal from said second error signal; and

a pulse width modulator configured to produce a signal to control a duty cycle of a boost power switch in said boost power stage of said power processing circuit as a function of said current compensation signal.

8. A method of operating a controller of a power processing circuit, comprising:

producing a product of an input current and an input voltage of said power processing circuit with a multiplier; and

producing an input power estimate of an input power to said power processing circuit as a function of said product of said input current and said input voltage with a low-pass filter.

9. The method as recited in claim 8 further comprising performing a correction of said input power estimate.

10. The method as recited in claim 9, further comprising calibrating said correction of said input power estimate during a manufacturing step to improve accuracy of said input power estimate.

11. The method as recited in claim 8 wherein said multiplier and said low-pass filter comprise a digital circuit.

12. The method as recited in claim 8 wherein said input current is a scaled, digitized inductor current of a boost power stage of said power processing circuit and said input voltage is a scaled, digitized input voltage.

13. The method as recited in claim 8 further comprising producing a signal to control a duty cycle of a boost power switch in a boost power stage of said power processing circuit.

14. The method as recited in claim 8, further comprising:

producing a voltage compensation signal as a function of a first error signal derived from a scaled, digitized output voltage of a boost power stage of said power processing subtracted from a reference output voltage;

producing a time-dependent current reference signal as a function of a voltage feed-forward signal derived from a scaled, digitized input voltage and said voltage compensation signal;

producing a second error signal as a function of a current feedback signal derived from a scaled, digitized inductor current of a boost power stage of said power processing circuit and said time-dependent current reference signal;

producing a current compensation signal from said second error signal; and

producing a signal to control a duty cycle of a boost power switch in said boost power stage of said power processing circuit as a function of said current compensation signal.

15. A power converter, comprising:

a boost power stage including a boost power switch configured to receive an input power with an input current and input voltage; and

a controller, including;

a multiplier configured to produce a product of said input current and said input voltage, and

a low-pass filter configured to produce an input power estimate of said input power as a function of said product of said input current and said input voltage.

16. The power converter as recited in claim 15 wherein said controller further includes a conversion circuit configured to perform a correction of said input power estimate.

17. The power converter as recited in claim 15 wherein said multiplier and said low-pass filter comprise a digital circuit.

18. The power converter as recited in claim 15 wherein said input current is a scaled, digitized inductor current of said boost power stage and said input voltage is a scaled, digitized input voltage.

19. The power converter as recited in claim 15 wherein said input power estimate is provided to an external system through a communications means.

20. The power converter as recited in claim 15 wherein said controller, further includes:

a voltage loop compensator configured to produce a voltage compensation signal as a function of a first error signal derived from a scaled, digitized output voltage of said boost power stage subtracted from a reference output voltage;

a multiplier configured to produce a time-dependent current reference signal as a function of a voltage feed-forward signal derived from a scaled, digitized input voltage via a feedback circuit and said voltage compensation signal;

a summer configured to produce a second error signal as a function of a current feedback signal derived from a scaled, digitized inductor current of said boost power stage and said time-dependent current reference signal;

a current loop compensator configured to produce a current compensation signal from said second error signal; and

a pulse width modulator configured to produce a signal to control a duty cycle of said boost power switch as a function of said current compensation signal.