Processor cache management with software input via an intermediary

• US 20080320235A1
• Filed: 06/22/2007
• Published: 12/25/2008
• Est. Priority Date: 06/22/2007
• Status: Active Grant

• Current Assignee: Microsoft Technology Licensing LLC (Microsoft Corporation)
• Original Assignee: Microsoft Corporation
• Inventors: Waters, Bradley M., Beckmann, Bradford
• Granted Patent: US 7,975,107 B2
• Time in Patent Office: Days
• US Class Current: 711/144
• CPC Class Codes: G06F 12/126 with special data handling, e.g. priority of data or instructions, handling errors or pinning

Abstract

Software assists a processor subsystem in making cache replacement decisions by providing an intermediary with information regarding how instructions and/or data of a working set are expected to be used and accessed by the software. The intermediary uses this information along with its knowledge of system requirements, policy and the cache configuration to determine cache usage and management hints for the working sets. The cache usage and management hints are passed by the intermediary to the processor subsystem.

Claims

1. A method of cache management in a computer system, the method comprising:

providing, by an upper layer of software of the computer system, input to an intermediary between the upper layer of software and a processor subsystem of the computer system, where the input indicates how items of a working set are going to be accessed by the upper layer of software when the upper layer of software is executed by the processor subsystem;

determining, by the intermediary, a cache usage and management hint for the working set based at least in part on the input and a cache configuration of the processor subsystem; and

providing, by the intermediary, the cache usage and management hint to the processor subsystem for consideration by the processor subsystem when performing cache management.

2. The method of claim 1, further comprising:

storing the input and the cache usage and management hint internally in the intermediary at a page level.

3. The method of claim 2, wherein storing the input and the cache usage and management hint comprises:

storing the input and the cache usage and management hint in a page table maintained by an operating system of the computer system.

4. The method of claim 3, wherein providing the cache usage and management hint to the processor subsystem comprises:

providing the cache usage and management hint to the processor subsystem as additional information in a translation lookaside buffer fill.

5. The method of claim 1, further comprising:

storing the input and the cache usage and management hint internally in the intermediary at a cache-line level.

6. The method of claim 1, wherein the intermediary comprises an operating system and providing the input comprises:

providing the input as additional information when requesting that the operating system allocate memory.

7. The method of claim 6, wherein providing the input comprises:

specifying changes to previous input provided to the intermediary.

8. The method of claim 1, wherein the input comprises an indication that the most recently used item of the working set will likely be the next item of the working set to be accessed and the cache usage and management hint is to implement a least recently used cache replacement policy.

9. The method of claim 1, wherein the input comprises an indication that the least recently used item of the working set will likely be the next item of the working set to be accessed and the cache usage and management hint is to implement a most recently used cache replacement policy.

10. The method of claim 1, wherein the input comprises an indication that the items of the working set are accessed within a loop and accesses in an iteration of the loop are within a window of a particular size, and the cache usage and management hint is to cache the items directly in the smallest cache of the processor subsystem that is larger than the size of the window and to store the items directly in main memory of the computer system if all caches are smaller than the size of the window.

11. The method of claim 1, wherein the input comprises an indication that the items of the working set are accessed within a window of a particular size until the items are never accessed again, and the cache usage and management hint is to prevent the items from being cached in certain caches of the processor subsystem unless the size of the window is larger than the next-to-largest of the caches.

12. A processor subsystem comprising:

at least one processor;

one or more caches able to store items of working sets along with indications of cache usage and management hints for the items,

wherein the cache usage and management hints are considered by the processor subsystem when managing one or more of the caches.

13. The processor subsystem of claim 12, further comprising:

means for tracking usage and performance events within the processor subsystem.

14. The processor subsystem of claim 13, further comprising:

a data structure to store performance event enable bits that identify for which items events should be profiled.

15. The processor subsystem of claim 13, wherein the performance events include cache accesses.

16. The processor subsystem of claim 13, wherein the performance events include cache misses.

17. The processor subsystem of claim 13, wherein the usage and performance events are tracked at a cache-line granularity.

18. The processor subsystem of claim 13, wherein the usage and performance events are tracked at a page granularity.

19. The processor subsystem of claim 13, wherein the usage and performance events are tracked at a set of pages granularity.

20. The processor subsystem of claim 13, further comprising:

means for tracking residency time of cache lines through the one or more caches.