METHOD FOR PROGRAMMING MULTI-LEVEL CELL FLASH MEMORY DEVICE

• US 20090003055A1
• Filed: 12/28/2007
• Published: 01/01/2009
• Est. Priority Date: 06/26/2007
• Status: Active Grant

• Current Assignee: Hynix Semiconductor Incorporated (SK Hynix Inc.)
• Original Assignee: Hynix Semiconductor Incorporated (SK Hynix Inc.)
• Inventors: HWANG, Kyung Pil
• Granted Patent: US 7,701,768 B2
• Time in Patent Office: Days
• US Class Current: 365/185.30
• CPC Class Codes: G11C 11/5628 Programming or writing circuits; Data input circuits
• CPC Class Codes: G11C 16/3454 Arrangements for verifying correct programming or for detecting overprogrammed cells
• CPC Class Codes: G11C 2211/5621 Multilevel programming verification

Abstract

A method for programming an MLC flash memory device minimizes interference between adjacent cells during a program operation, such that threshold voltage distribution becomes narrow and uniform. According to the method, an auxiliary program operation is performed on memory cells to be programmed, such that a majority of the memory cells have a positive threshold voltage. An LSB of a particular memory cell is programmed to a predetermined level, and data of the programmed LSB is sensed. An MSB of the particular memory cell is programmed to a predetermined level according to the sensed data of the LSB.

Claims

1. A method for programming a multi-level cell (MLC) flash memory device, the method comprising:

performing an auxiliary program operation on a plurality of memory cells to be programmed, such that a majority of the memory cells have a positive threshold voltage;

programming a least significant bit (LSB) of a particular memory cell to a predetermined level;

sensing data of the programmed LSB; and

programming a most significant bit (MSB) of the particular memory cell to a predetermined level according to the sensed data of the LSB.

2. The method of claim 1, wherein performing the auxiliary program operation comprises:

applying a program voltage to memory cells in a selected block of the plurality of memory cells, wherein the particular memory cell is included in the selected block;

verifying a programmed state of the particular memory cell; and

terminating the auxiliary program operation if the programmed state of the particular memory cell is verified,

otherwise, reprogramming the particular memory cell by increasing the program voltage by a step voltage.

3. The method of claim 2, wherein verifying the programmed state verifies that the particular memory cell is programmed if there is at least one memory cell having a threshold voltage above a verify voltage among the memory cells in the selected block.

4. The method of claim 1, wherein programming the LSB and MSB of the particular memory cell is performed through an incremental step pulse program (ISPP) method.

5. The method of claim 2, further comprising, before performing the auxiliary program operation, erasing data of the particular memory cell in the selected block.

6. The method of claim 1, wherein programming the MSB of the memory cell comprises using different program start voltages according to the sensed data of the LSB for programming.

7. A method for programming an MLC flash memory device including a plurality of memory cells, the method comprising:

programming an LSB of a particular memory cell of a plurality of memory cells to a predetermined level;

performing an auxiliary program such that a majority of the plurality of memory cells have a positive threshold voltage, the plurality of memory cells being programmed from an erased state to a first program level;

sensing LSB data of the particular memory cell; and

programming an MSB of the particular memory cell to a predetermined level according to the sensed LSB data.

8. The method of claim 7, wherein performing the auxiliary program comprises:

applying a program voltage to the particular memory cell, the particular memory cell being programmed from an erased state to a first program level;

verifying a programmed state of the particular memory cell; and

terminating the auxiliary program if the programmed state of the particular memory cell is verified,

otherwise, reprogramming the particular memory cell by increasing the program voltage by a predetermined step voltage.

9. The method of claim 8, wherein verifying the programmed state verifies that that the particular memory cell is programmed if there is at least one memory cell having a threshold voltage above a verify voltage among the plurality of memory cells.

10. The method of claim 7, wherein programming the LSB and MSB of the particular memory cell is performed through an ISPP method.

11. The method of claim 7, wherein programming the MSB of the particular memory cell comprises using different program start voltages according to the sensed LSB data for programming.

12. The method of claim 7, further comprising, before programming the LSB of the particular memory cell to the predetermined level, erasing data of the particular memory cell.