Method for fabricating semiconductor device

• US 20090004885A1
• Filed: 06/06/2008
• Published: 01/01/2009
• Est. Priority Date: 06/29/2007
• Status: Abandoned Application

• Current Assignee: Oki Semiconductor Company Limited (ROHM Co., Ltd.)
• Original Assignee: OKI Electric Industry Company Limited
• Inventors: Komatsu, Koji
• Application Number:
  US12/155,638
• Publication Number:
  US 20090004885A1
• Time in Patent Office: Days
• US Class Current: 438/782
• CPC Class Codes: H01L 21/31055 the removal being a chemical etching step, e.g. dry etching etching per se H01L21/311
• CPC Class Codes: H01L 21/31116 by dry-etching
• CPC Class Codes: H01L 21/76816 Aspects relating to the layout of the pattern or to the size of vias or trenches layout of the interconnections per se H01L23/528; CAD of ICs G06F30/00
• CPC Class Codes: H01L 21/76819 Smoothing of the dielectric planarisation of insulating materials per se H01L21/31051
• CPC Class Codes: H01L 22/26 Acting in response to an ongoing measurement without interruption of processing, e.g. endpoint detection, in-situ thickness measurement endpoint detection arrangements in CMP apparatus B24B37/013, in discharge apparatus H01J37/32
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

An object of the present invention is to provide a method for fabricating a semiconductor device capable of implementing planarization of an insulating film formed on a semiconductor substrate formed thereon with a circuit pattern and inhibiting unevenness of a film thickness of the insulating film, and a device thereof.

According to the present invention, when etching is progressed to an A-A line, a part of a BPSG film 14 is exposed from an SOG film 16. A point at which the part of the BPSG film 14 is exposed is an “exposure start point”. A change of a plasma emission intensity of oxygen atoms during etching is observed to detect the “exposure start point”. An EPD detection in which an “etching end point” is set using the “exposure start point” as a reference is performed. The etching is continued even after a start of exposure of the BPSG film 14. Before a B-B line at which an entire surface of the BPSG film 14 is exposed is reached, the etching is ended at a C-C line.

Claims

1. A method for fabricating a semiconductor device, comprising:

forming on a semiconductor substrate having a circuit pattern thereon, a silicon oxide film and a spin on glass film (SOG film), as an insulating film, in this order;

flattening the insulating film by plasma etching;

observing a change of a plasma emission intensity of oxygen atoms during the etching to detect an exposure start point of the silicon oxide film of which the plasma emission intensity becomes constant, and then, starts increasing again; and

ending the plasma etching at the exposure start point or within a predetermined time from the exposure start point.

2. The method for fabricating a semiconductor device according to claim 1, wherein

the plasma etching is ended before an entire-surface exposed point of the silicon oxide film of which the plasma emission intensity becomes constant again.

3. The method for fabricating a semiconductor device according to claim 1, wherein

the silicon oxide film is a silicon oxide film (BPSG film) to which phosphorus and boron are added.