METHOD AND SYSTEM FOR A SECOND ORDER INPUT INTERCEPT POINT (IIP2) CORRECTION

• US 20090004983A1
• Filed: 08/28/2008
• Published: 01/01/2009
• Est. Priority Date: 10/29/2004
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Darabi, Hooman
• Granted Patent: US 7,869,777 B2
• Time in Patent Office: Days
• US Class Current: 455/130
• CPC Class Codes: H03D 3/008 Compensating DC offsets
• CPC Class Codes: H04B 1/30 for homodyne or synchrodyne receivers demodulator circuits H03D1/22
• CPC Class Codes: H04L 25/0272 Arrangements for coupling to multiple lines, e.g. for differential transmission
• CPC Class Codes: H04L 25/0294 Provision for current-mode coupling
• CPC Class Codes: H04L 25/0296 Arrangements to ensure DC-balance
• CPC Class Codes: H04L 25/061 providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of dc offset removal of dc offset in coupling arrangements H04L25/029, H04L25/0296

Abstract

In RF transceivers, a method and system for a second order input intercept point (IIP2) correction are provided. A DC offset sensor may detect DC offset voltages produced by blocker signals in “I” and “Q” signal component paths in an RF receiver. The DC offset sensor may generate control signals which may be utilized by a first and second injection circuits to generate DC offset currents that compensate for the DC offset voltages in the signal component paths. An injection circuit may utilize current drivers to generate binary weighted currents which may be added together to produce a DC offset current. The polarity of the DC offset current and the selection of which current drivers to use may be determined by the control signals. A calibration voltage may also be utilized to correct or adjust the gain in the injection circuit.

Claims

1. A method for a wireless receiver signal processing, the method comprising:

detecting a DC offset voltage;

generating a plurality of current driver control signals based on said detected DC offset voltage;

generating a plurality of weighted offset currents based on said generated plurality of current driver control signals and an input voltage; and

generating a DC offset current to compensate for said detected DC offset voltage, wherein said DC offset current is based on said generated plurality of weighted offset currents.

2-38. -38. (canceled)