Data input-output control apparatus

• US 20090006678A1
• Filed: 08/25/2008
• Published: 01/01/2009
• Est. Priority Date: 02/24/2006
• Status: Active Grant

• Current Assignee: Fujitsu Limited
• Original Assignee: Fujitsu Limited
• Inventors: Mishima, Masahiro
• Granted Patent: US 8,073,999 B2
• Time in Patent Office: Days
• US Class Current: 710/66
• CPC Class Codes: G06F 13/385 for adaptation of a particular data processing system to different peripheral devices
• CPC Class Codes: G06F 13/4018 with data-width conversion

Abstract

A system controller is presented that controls an output format of data according to a data congestion status of the data and then outputs the data over an output bus. Specifically, if there is data congestion, the system controller changes the format of the data to a format that matches a bus width of the output bus before outputting the data over the output bus. To give a specific example, the system controller changes the format of the data input over an input bus in an input format of 4 B to an output format of 5 B before outputting the data over the output bus. If there is no data congestion, the system controller outputs the data over the output bus without changing the input format.

Claims

1. A data input-output control apparatus that receives data over an input bus and outputs the data over an output bus having a larger bus width than the input bus, the data input-output control apparatus comprising:

a judging unit that determines a data congestion status from the time the data is input over the input bus till the time the data is output over the output bus; and

an output-format control unit that changes a format of the data to match the bus width of the output bus and outputs the data over the output bus in the changed format if the judging unit determines that there is data congestion, and leaves the format of the data unchanged and outputs the data over the output bus if the judging unit determines that there is no data congestion.

2. The data input-output control apparatus according to claim 1, wherein the data input over the input bus is temporarily stored in a RAM, stored in an output buffer and output over the output bus if there is data already temporarily stored in the RAM, and the input data is routed over a RAM bypass circuit, stored in the output buffer and output over the output bus if there is no data already stored in the RAM, and

the judging unit determines that there is data congestion if the data input over the input bus is temporarily stored in the RAM and stored in the output buffer, and that there is no data congestion if the data input over the input bus is routed over the RAM bypass circuit and stored in the output buffer.

3. The data input-output control apparatus according to claim 1, wherein the data input over the input bus is stored in the output buffer and output over the output bus, and

the judging unit determines that there is data congestion if a predetermined amount of data is already stored in the output buffer, and that there is no data congestion if the predetermined amount of data is not yet stored in the output buffer.