METHODS AND APPARATUS FOR H-ARQ PROCESS MEMORY MANAGEMENT

• US 20090006778A1
• Filed: 06/29/2007
• Published: 01/01/2009
• Est. Priority Date: 06/29/2007
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Sidi, Jonathan, Jim, Samson
• Granted Patent: US 9,160,496 B2
• Time in Patent Office: Days
• US Class Current: 711/154
• CPC Class Codes: H04L 1/1812 Hybrid protocols; Hybrid automatic repeat request [HARQ]
• CPC Class Codes: H04L 1/1835 Buffer management
• CPC Class Codes: H04L 1/1845 Combining techniques, e.g. code combining

Abstract

Methods and apparatus are presented for H-ARQ process dynamic memory management. A method for dynamically managing memory for storing data associated with H-ARQ processes is presented, which includes receiving a packet associated with a H-ARQ process, determining if a free memory location is available in a H-ARQ buffer, assigning the packet to the free memory location, determining if the packet was successfully decoded, and retaining the packet in the assigned memory location for combination with a subsequent packet retransmission if the packet was not successfully decoded. Also presented are apparatus having logic configured to perform the presented methods.

Claims

1. A method for dynamically managing memory for storing data associated with H-ARQ processes, comprising:

receiving a packet associated with a H-ARQ process;

determining if a free memory location is available in a H-ARQ buffer;

assigning the packet to the free memory location;

determining if the packet was successfully decoded; and

retaining the packet in the assigned memory location for combination with a subsequent packet retransmission if the packet was not successfully decoded.

2. The method of claim 1, further comprising:

sending a discontinuous transmission (DTX) signal to Node B if there is no free memory location available in the H-ARQ buffer.

3. The method of claim 2, further comprising:

determining if a threshold associated with a number of sent DTX signals has been exceeded; and

modifying the H-ARQ buffer memory size base when the predetermined number of sent DTX signals is exceeded.

4. The method of claim 3, wherein modifying the H-ARQ buffer memory size further comprises:

reducing the amount of memory space assigned to non-HSDPA services, and increasing the amount of memory assigned to the H-ARQ buffer.

5. The method of claim 1, further comprising:

determining if the received packet is a new packet; and

determining if a previous packet associated with the H-ARQ process decoded successfully if the received packet is not a new packet.

6. The method of claim 5, wherein if it is determined the previous packet associated with the H-ARQ process was not decoded successfully, the method further comprising:

storing the received packet in a corresponding memory location in the H-ARQ buffer if it is determined the previous packet associated with the H-ARQ process was not decoded successfully; and

decoding the received packet.

7. The method of claim 5, further comprising:

sending a Negative Acknowledgement (NACK) signal if the received packet was not decoded successfully.

8. The method of claim 5, wherein if the received packet was decoded successfully, the method further comprising:

discarding the received packet from the assigned memory location;

freeing the assigned memory location in the H-ARQ buffer; and

sending an Acknowledgement (ACK) signal to Node B.

9. The method of claim 1, wherein the packet is assigned to the free memory location which is distal from the memory space associated with non-HS services.

10. The method of claim 1, further comprising:

performing the method of claim 1 for subsequently received packets, wherein each packet is associated with a H-ARQ ID.

22. The apparatus of claim 13, further comprising:

means for performing the method of claim 1 for subsequently received packets, wherein each packet is associated with a H-ARQ ID.

11. A method for managing the memory of a UE device, comprising:

determining the available memory space for HSDPA H-ARQ processes;

determining the memory amount for each H-ARQ processes;

determining the number of H-ARQ process (n_T) which can be stored;

determining if the total number of H-ARQ processes assigned for a given UE category exceeds n_T; and

performing dynamic memory management for H-ARQ process storage if the total number of H-ARQ processes assigned for a given UE category exceeds n_T.

12. The method of claim 11, further comprising:

performing static memory management for H-ARQ process storage, if the total number of H-ARQ processes assigned for a given UE category does not exceeds n_T.

13. An apparatus for dynamically managing memory for storing data associated with H-ARQ processes, comprising:

means for receiving a packet associated with a H-ARQ process;

means for determining if a free memory location is available in a H-ARQ buffer;

means for assigning the packet to the free memory location;

means for determining if the packet was successfully decoded; and

means for retaining the packet in the assigned memory location for combination with a subsequent packet retransmission if the packet was not successfully decoded.

14. The apparatus of claim 13, further comprising:

means for sending a discontinuous transmission (DTX) signal to Node B if there is no free memory location available in the H-ARQ buffer.

15. The apparatus of claim 14, further comprising:

means for determining if a predetermined number of sent DTX signals has been exceeded; and

means for modifying the H-ARQ buffer memory size base when the predetermined number of sent DTX signals is exceeded.

16. The apparatus of claim 15, wherein the means for modifying the H-ARQ buffer memory size further comprises:

means for reducing the amount of memory space assigned to non-HSDPA services, and increasing the amount of memory assigned to the H-ARQ buffer.

17. The apparatus of claim 13, further comprising:

means for determining if the received packet is a new packet; and

means for determining if the previous packet associated with the H-ARQ process decoded successfully if the received packet is not a new packet.

18. The apparatus of claim 17, further comprising:

means for storing the received packet in a corresponding memory location in the H-ARQ buffer; and

means for decoding the received packet.

19. The apparatus of claim 17, further comprising:

means for sending a Negative Acknowledgement (NACK) signal if the received packet was not decoded successfully.

20. The apparatus of claim 17, further comprising:

means for discarding the received packet from the assigned memory location;

means for freeing the assigned memory location in the H-ARQ buffer; and

means for sending an acknowledgement (ACK) signal to Node B.

21. The apparatus of claim 13, wherein the packet is assigned to the free memory location which is distal from the memory space associated with non-HS services.

23. An apparatus for managing the memory of a UE device, comprising:

means for determining the available memory space for HSDPA H-ARQ processes;

means for determining the memory amount for each H-ARQ process;

means for determining the number of H-ARQ process (n_T) which can be stored;

means for determining if the total number of H-ARQ processes assigned for a given UE category exceeds n_T; and

means for performing dynamic memory management for H-ARQ process storage if the total number of H-ARQ processes assigned for a given UE category exceeds n_T.

24. The apparatus of claim 23, further comprising:

means for performing static memory management for H-ARQ process storage, if the total number of H-ARQ processes assigned for a given UE category does not exceeds n_T.

25. An apparatus comprising:

logic configured to receive a packet associated with a H-ARQ process;

logic configured to determine if a free memory location is available in a H-ARQ buffer;

logic configured to assign the packet to the free memory location;

logic configured to determine if the packet was successfully decoded; and

logic configured to retain the packet in the assigned memory location for combination with a subsequent packet retransmission if the packet was not successfully decoded.

26. The apparatus of claim 25, further comprising:

logic configured to send a discontinuous transmission (DTX) signal to Node B if there is no free memory location available in the H-ARQ buffer.

27. The apparatus of claim 26, further comprising:

logic configured to determine if a threshold associated with a number of sent DTX signals has been exceeded; and

logic configured to modify the H-ARQ buffer memory size base when the predetermined number of sent DTX signals is exceeded.

28. An apparatus comprising:

logic configured to determine the available memory space for HSDPA H-ARQ processes;

logic configured to determine the memory amount for each H-ARQ processes;

logic configured to determine the number of H-ARQ process (n_T) which can be stored;

logic configured to determine if the total number of H-ARQ processes assigned for a given UE category exceeds n_T; and

logic configured to perform dynamic memory management for H-ARQ process storage if the total number of H-ARQ processes assigned for a given UE category exceeds n_T.

29. The apparatus of claim 28, further comprising:

logic configured to perform static memory management for H-ARQ process storage, if the total number of H-ARQ processes assigned for a given UE category does not exceeds n_T.

30. A computer-readable medium including program code stored thereon for dynamically managing memory for storing data associated with H-ARQ processes, comprising:

program code to receive a packet associated with a H-ARQ process;

program code to determine if a free memory location is available in a H-ARQ buffer;

program code to assign the packet to the free memory location;

program code to determine if the packet was successfully decoded; and

program code to retain the packet in the assigned memory location for combination with a subsequent packet retransmission if the packet was not successfully decoded.

31. A computer-readable medium including program code stored thereon for managing the memory of a UE device, comprising:

program code to determine the available memory space for HSDPA H-ARQ processes;

program code to determine the memory amount for each H-ARQ processes;

program code to determine the number of H-ARQ process (n_T) which can be stored;

program code to determine if the total number of H-ARQ processes assigned for a given UE category exceeds n_T; and

program code to perform dynamic memory management for H-ARQ process storage if the total number of H-ARQ processes assigned for a given UE category exceeds n_T.