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Techniques For Generating Bit Reliability Information In A Post-Processor Using An Error Correction Constraint

  • US 20090006931A1
  • Filed: 06/29/2007
  • Published: 01/01/2009
  • Est. Priority Date: 06/29/2007
  • Status: Active Grant
First Claim
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1. A system for generating bit reliabilities, the system comprising:

  • a detector that generates a detected sequence; and

    a post-processor that finds a first set of combinations of at least one error event in the detected sequence satisfying error correction constraints corresponding to a first bit value, finds a second set of combinations of at least one error event in the detected sequence satisfying error correction constraints corresponding to a second bit value, selects a first most likely error event from the first set and a second most likely error event from the second set, and generates a bit reliability based on the first and the second most likely error events.

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