Methods and apparatus for automation of register maps

• US 20090007058A1
• Filed: 06/26/2007
• Published: 01/01/2009
• Est. Priority Date: 06/26/2007
• Status: Active Grant

• Current Assignee: Analog Devices, Inc.
• Original Assignee: Analog Devices, Inc.
• Inventors: Dharmagadda, Tushneem
• Granted Patent: US 8,122,428 B2
• Time in Patent Office: Days
• US Class Current: 717/104
• CPC Class Codes: G06F 30/30 Circuit design

Abstract

In one aspect, a software application for facilitating design of a register specification is provided. The application comprises an interface adapted to receive input from a user indicating information about at least one register in the register specification, the interface generating register information based on the received input, a translator coupled to the interface to receive the register information and adapted to convert the register information to an internal representation, and at least one filter adapted to transform the internal representation into at least one respective output format.

Claims

1. A software application for facilitating design of a register specification, the application comprising:

a user interface adapted to receive input from a user indicating information about at least one register in the register specification, the interface generating register information based on the received input;

a translator coupled to the interface to receive the register information and adapted to convert the register information to an internal representation; and

at least one filter adapted to transform the internal representation into at least one respective output format.

2. The application of claim 1, wherein the user interface is a graphical user interface (GUI) that allows a user to define the register specification in a first hierarchical structure having a plurality of levels.

3. The application of claim 2, wherein the first hierarchical structure includes a first level for specifying a register module as part of the register specification, the register module including a plurality of registers.

4. The application of claim 3, wherein the first hierarchical structure includes a second level for defining register level information for each of the plurality of registers in the register module.

5. The application of claim 4, wherein the first hierarchical structure includes a third level for defining bit fields for selected ones of the plurality of registers defined in the register module.

6. The application of claim 5, wherein the first hierarchical structure includes a fourth level for defining an enumeration for each bit field defined for the selected ones of the plurality of registers defined in the register module.

7. The application of claim 2, wherein the internal representation has a second hierarchical structure that reflects the first hierarchical structure.

8. The application of claim 7, wherein the internal representation includes extensible mark-up language (XML).

9. The application of claim 1, further comprising a database capable of storing a plurality of internal representations corresponding to a respective plurality of register specifications input by the user via the interface.

10. The application of claim 9, wherein the internal representation includes extensible mark-up language (XML) and the database is adapted to store a plurality of XML documents.

11. The application of claim 3, wherein the translator is configured to generate a separate document in the internal representation for each module defined in the register specification.

12. The application of claim 1, wherein the at least one filter includes a filter capable of converting the internal representation into at least one hypertext markup language (HTML) document.

13. The application of claim 1, wherein the at least one filter includes a filter capable of converting the internal representation into at least one Verilog file.

14. The application of claim 1, wherein the at least one filter includes a filter capable of converting the internal representation into at least one Word document.

15. The application of claim 1, wherein the at least one filter includes a filter capable of converting the internal representation into at least one of a C and a C⁺⁺ file.

16. The application of claim 1, wherein the at least one filter includes a filter capable of converting the internal representation into at least one portable document format (PDF) document.

17. The application of claim 2, wherein the GUI includes a block register interface adapted to allow a user to define a repeated block of registers, wherein each register in the block of registers is defined via the GUI once, and wherein the block register interface includes an input to receive a count n indicating a number of times the defined block of registers is to be repeated.

18. The application of claim 17, wherein the translator is configured to expand the block of registers such that the internal representation includes a representation for each register in each of the n blocks.

19. The application of claim 9, wherein the database stores a library accessible by the user interface, the library storing at least one template corresponding to a standard component.

20. The application of claim 19, wherein the at least one template includes at least one serial interface template.

21. The application of claim 20, wherein the at least one template includes a Serial Peripheral Interface (SPI) template and an Inter Integrated Circuit (I²C) template.

22. The application of claim 21, wherein the SPI template includes connections for ports defined by an SPI standard, and wherein the I²C template includes connections for ports defined by an I²C standard.

23. The application of claim 20, wherein the at least one serial interface template includes connections for ports defined by a respective serial interface standard, and provides an empty register map to be defined by the user.

24. The application of claim 23, wherein the UI is configured to provide an interface component that allows a user to link two or more registers to create a linked register having a desired width.

25. A computer readable medium encoding instructions capable of being executed on one or more processors, the instructions, when executed, performing a method of generating a register specification based on input provided by a user, the method comprising:

providing a user interface for receiving input about at least one register for the register specification;

generating register information based on the received input;

translating the register information to an internal representation; and

transforming the internal representation into at least one respective output format.

26. The computer readable medium of claim 25, wherein providing a user interface includes providing a graphical user interface (GUI) that allows a user to define the register specification.

27. The computer readable medium of claim 26, wherein providing the GUI includes providing a GUI that permits a user to specify a register module as part of the register specification, the register module including a plurality of registers.

28. The computer readable medium of claim 27, wherein providing the GUI includes providing a GUI that permits a user to specify register level information for each of the plurality of registers in the register module.

29. The computer readable medium of claim 28, wherein providing the GUI includes providing a GUI that permits a user to specify bit fields for selected ones of the plurality of registers defined in the register module.

30. The computer readable medium of claim 29, wherein providing the GUI includes providing a GUI that permits a user to specify an enumeration for each bit field defined for the selected ones of the plurality of registers defined in the register module.

31. The computer readable medium of claim 25, wherein translating the register information includes converting the register information into at least one extensible mark-up language (XML) file.

32. The computer readable medium of claim 27, wherein translating the register information includes generating a separate document in the internal representation for each module defined in the register specification.

33. The computer readable medium of claim 25, wherein converting the internal representation includes converting the internal representation into at least one hypertext markup language (HTML) document.

34. The computer readable medium of claim 25, wherein converting the internal representation includes converting the internal representation into at least one Verilog file.

35. The computer readable medium of claim 25, wherein converting the internal representation includes converting the internal representation into at least one Word document.

36. The computer readable medium of claim 25, wherein converting the internal representation includes converting the internal representation into at least one of a C and a C⁺⁺ file.

37. The computer readable medium of claim 25, wherein converting the internal representation includes converting the internal representation into at least one portable document format (PDF) document.

38. The computer readable medium of claim 26, wherein providing the GUI includes providing a GUI that permits a user to specify a repeated block of registers, wherein each register in the block of registers is defined via the GUI once, and to specify a count n indicating a number of times the defined block of registers is to be repeated.

39. The computer readable medium of claim 37, wherein translating includes expanding the block of registers such that the internal representation includes a representation for each register in each of the n blocks.

40. The computer readable medium of claim 25, further comprising providing at least one template corresponding to a standard component.

41. The computer readable medium of claim 40, wherein providing the at least one template includes providing at least one serial interface template.

42. The computer readable medium of claim 41, wherein providing the at least one template includes providing at least one of a Serial Peripheral Interface (SPI) template and an Inter Integrated Circuit (I²C) template.

43. The computer readable medium of claim 26, wherein providing the GUI includes providing a GUI that permits a user to link two or more registers to create a linked register having a desired width.

44. The computer readable medium of claim 26 in combination with a plurality of processors distributed over a plurality of computers connected via a network such that the instructions can be executed from any of the plurality of computers connected via the network.