MESSAGE PASSING WITH A LIMITED NUMBER OF DMA BYTE COUNTERS
First Claim
1. A method for passing messages in a parallel computer system comprising a plurality of compute nodes interconnected as a network, where each compute node includes a DMA engine comprising a limited number of byte counters for tracking a number of bytes that are sent or received by the DMA engine, and where said byte counters may be used in shared counter or exclusive counter mode of operation, the method including the steps of:
- using rendezvous protocol, a source compute node deterministically sending a request to send (RTS) message with a single RTS descriptor using an exclusive injection counter to track both the RTS message and message data to be sent in association with the RTS message, to a destination compute node, wherein the RTS descriptor indicates to the destination compute node that said message data will be adaptively routed to the destination node;
using one DMA FIFO at the source compute node for maintaining RTS descriptors for rendezvous messages destined for said destination compute node to ensure proper message data ordering thereat;
using a reception counter at a DMA engine at the destination compute node to track reception of the RTS and associated message data thereat;
sending a clear to send (CTS) message from the destination node to the source node in a rendezvous protocol form of a remote get to accept the RTS message and message data; and
processing the remote get (CTS) by the source compute node DMA engine to provide the message data to be sent.
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Accused Products
Abstract
A method for passing messages in a parallel computer system constructed as a plurality of compute nodes interconnected as a network where each compute node includes a DMA engine but includes only a limited number of byte counters for tracking a number of bytes that are sent or received by the DMA engine, where the byte counters may be used in shared counter or exclusive counter modes of operation. The method includes using rendezvous protocol, a source compute node deterministically sending a request to send (RTS) message with a single RTS descriptor using an exclusive injection counter to track both the RTS message and message data to be sent in association with the RTS message, to a destination compute node such that the RTS descriptor indicates to the destination compute node that the message data will be adaptively routed to the destination node. Using one DMA FIFO at the source compute node, the RTS descriptors are maintained for rendezvous messages destined for the destination compute node to ensure proper message data ordering thereat. Using a reception counter at a DMA engine, the destination compute node tracks reception of the RTS and associated message data and sends a clear to send (CTS) message to the source node in a rendezvous protocol form of a remote get to accept the RTS message and message data and processing the remote get (CTS) by the source compute node DMA engine to provide the message data to be sent.
153 Citations
24 Claims
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1. A method for passing messages in a parallel computer system comprising a plurality of compute nodes interconnected as a network, where each compute node includes a DMA engine comprising a limited number of byte counters for tracking a number of bytes that are sent or received by the DMA engine, and where said byte counters may be used in shared counter or exclusive counter mode of operation, the method including the steps of:
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using rendezvous protocol, a source compute node deterministically sending a request to send (RTS) message with a single RTS descriptor using an exclusive injection counter to track both the RTS message and message data to be sent in association with the RTS message, to a destination compute node, wherein the RTS descriptor indicates to the destination compute node that said message data will be adaptively routed to the destination node; using one DMA FIFO at the source compute node for maintaining RTS descriptors for rendezvous messages destined for said destination compute node to ensure proper message data ordering thereat; using a reception counter at a DMA engine at the destination compute node to track reception of the RTS and associated message data thereat; sending a clear to send (CTS) message from the destination node to the source node in a rendezvous protocol form of a remote get to accept the RTS message and message data; and processing the remote get (CTS) by the source compute node DMA engine to provide the message data to be sent. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. A computer program product, the computer program product comprising:
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a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method for message passing comprising the steps of; using rendezvous protocol, a source compute node deterministically sending a request to send (RTS) message with a single RTS descriptor using an exclusive injection counter to track both the RTS message and message data to be sent in association with the RTS message, to a destination compute node, wherein the RTS descriptor indicates to the destination compute node that said message data will be adaptively routed to the destination node; using one DMA FIFO at the source compute node for maintaining RTS descriptors for rendezvous messages destined for said destination compute node to ensure proper message data ordering thereat; using a reception counter at a DMA engine at the destination compute node to track reception of the RTS and associated message data thereat; sending a clear to send (CTS) message from the destination node to the source node in a rendezvous protocol form of a remote get to accept the RTS message and message data; and processing the remote get (CTS) by the source compute node DMA engine to provide the message data to be sent; wherein the message is complete when the injection counter at said first compute node counts down to zero (0), and wherein the receive is complete when the reception counter at said destination compute node counts down to zero (0).
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- 15. A parallel computer system compring a plurality of interconnected compute nodes that includes message passing between said interconnected compute nodes, wherein each compute node comprises at least one processor, a memory and a DMA engine with counters that may be used either as shared or exclusive injection counters, and wherein the shared injection counters track the progress of many messages, while the exclusive injection counters track the progress of only one message.
Specification