Three-Dimensional Memory Cells

• US 20090008722A1
• Filed: 09/17/2008
• Published: 01/08/2009
• Est. Priority Date: 08/28/2002
• Status: Active Grant

• Current Assignee: Guobiao Zhang
• Original Assignee: Guobiao Zhang
• Inventors: Zhang, Guobiao
• Granted Patent: US 7,847,283 B2
• Time in Patent Office: Days
• US Class Current: 257/390
• CPC Class Codes: G11C 17/06 using diode elements G11C17/14 takes precedence
• CPC Class Codes: G11C 17/14 in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
• CPC Class Codes: G11C 5/063 Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
• CPC Class Codes: H01L 21/8221 Three dimensional integrated circuits stacked in different levels
• CPC Class Codes: H01L 27/0688 Integrated circuits having a three-dimensional layout
• CPC Class Codes: H01L 27/105 including field-effect components
• CPC Class Codes: H01L 29/06 characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
• CPC Class Codes: H01L 29/76 Unipolar devices , e.g. field effect transistors
• CPC Class Codes: H10B 20/00 Read-only memory [ROM] devices
• CPC Class Codes: H10B 20/20 Programmable ROM [PROM] devices comprising field-effect components H10B20/10 takes precedence
• CPC Class Codes: H10B 20/50 having transistors on different levels, e.g. 3D ROM
• CPC Class Codes: H10B 20/65 of memory structures of the ROM only type
• CPC Class Codes: H10B 41/20 characterised by three-dimensional arrangements, e.g. with cells on different height levels
• CPC Class Codes: H10B 41/30 characterised by the memory core region
• CPC Class Codes: H10B 69/00 Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Abstract

The present invention discloses a three-dimensional memory (3D-M) with polarized 3D-ROM (three-dimensional read-only memory) cells. Polarized 3D-ROM can ensure a larger unit array and therefore, a better integratibility.

Claims

1. A polarized 3D-ROM (three-dimensional read-only memory) cell, comprising:

first and second conductive layers; and

a polarized quasi-conductive layer between said first and second conductive layers, said polarized quasi-conductive layer having a first interface with said first conductive layer and a second interface different from said first interface with said second conductive layer;

whereby said polarized quasi-conductive layer has a lower resistance when the current flows in one direction than when the current flows in the opposite direction.

2. The polarized 3D-ROM cell according to claim 1, wherein said 3D-ROM is three-dimensional mask-programmable read-only memory (3D-MPROM).

3. The polarized 3D-ROM cell according to claim 1, wherein said 3D-ROM is three-dimensional electrically programmable read-only memory (3D-EPROM).

4. The polarized 3D-ROM cell according to claim 1, wherein selected one of said first and second interfaces comprises at least one field-enhancing tip.

5. The polarized 3D-ROM cell according to claim 1, wherein said first conductive layer comprises a first conductive material, and said second conductive layer comprises a second conductive material different from said first conductive material.

6. The polarized 3D-ROM cell according to claim 5, wherein said first and second conductive materials have different work functions.

7. The polarized 3D-ROM cell according to claim 5, wherein said first conductive material is a metallic material, and said second conductive material is a doped semiconductor material.

8. A 3D-ROM (three-dimensional read-only memory) cell in a three-dimensional memory (3D-M), comprising:

first and second electrodes; and

a 3D-ROM layer between said first and second electrodes and comprising a large-bandgap semiconductor material, wherein the bandgap of said large-bandgap semiconductor material is larger than silicon, and said 3D-ROM layer has a lower resistance when the current flows in one direction than in the opposite direction;

whereby said 3D-ROM supports high-temperature operation.

9. The 3D-ROM cell according to claim 8, wherein said 3D-ROM is a three-dimensional mask-programmable read-only memory (3D-MPROM).

10. The 3D-ROM cell according to claim 8, wherein said 3D-ROM is three-dimensional electrically programmable read-only memory (3D-EPROM).

11. The 3D-ROM cell according to claim 8, wherein said 3D-ROM layer comprises a large-bandgap material selected from a group consisting of C, SiC_x (x>

0), SiO_y (y>

0), and SiN_z (z>

0), or a semiconductor material doped with at least a material selected from a group consisting of C, O, N.

12. A three-dimensional memory (3D-M), comprising:

a substrate with transistors thereon;

a plurality of memory levels stacked on top of said substrate and connected with said substrate with a plurality of contact vias, each of said memory levels further comprising a plurality of address-selection lines;

wherein the base material of a selected one of said address-selection lines is a semiconductor material but not a metallic material.

13. The 3D-M according to claim 12, wherein said 3D-M is a three-dimensional mask-programmable read-only memory (3D-MPROM).

14. The 3D-M according to claim 12, wherein said 3D-M is three-dimensional electrically programmable read-only memory (3D-EPROM).

15. The 3D-M according to claim 12, wherein said selected one of said address-selection lines are doped by implanting metallic ions.