Semiconductor device and manufacturing method of the same

• US 20090008728A1
• Filed: 06/24/2008
• Published: 01/08/2009
• Est. Priority Date: 07/02/2007
• Status: Active Grant

• Current Assignee: DENSO Corporation
• Original Assignee: DENSO Corporation
• Inventors: Sugiura, Kazuhiko, Fujii, Tetsuo
• Granted Patent: US 7,968,958 B2
• Time in Patent Office: Days
• US Class Current: 257/415
• CPC Class Codes: B81B 2207/07 Interconnects
• CPC Class Codes: B81B 2207/097 Interconnects arranged on the substrate or the lid, and covered by the package seal
• CPC Class Codes: B81B 7/007 Interconnections between the MEMS and external electrical signals
• CPC Class Codes: B81C 2203/0118 Bonding a wafer on the substrate, i.e. where the cap consists of another wafer
• CPC Class Codes: G01P 15/0802 Details
• CPC Class Codes: H01L 2224/05001 Internal layers
• CPC Class Codes: H01L 2224/05008 Bonding area integrally formed with a redistribution layer on the semiconductor or solid-state body, e.g.
• CPC Class Codes: H01L 2224/05124 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/05147 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/05572 the external layer extending out of an opening
• CPC Class Codes: H01L 2224/05624 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/0616 Random array, i.e. array with no symmetry
• CPC Class Codes: H01L 2224/16145 the bodies being stacked
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details

Abstract

A semiconductor device includes: a sensor element having a plate shape with a surface and including a sensor structure disposed in a surface portion of the sensor element; and a plate-shaped cap element bonded to the surface of the sensor element. The cap element has a wiring pattern portion facing the sensor element. The wiring pattern portion connects an outer periphery of the surface of the sensor element and the sensor structure so that the sensor structure is electrically coupled with an external element via the outer periphery. The sensor element does not have a complicated multi-layered structure, so that the sensor element is simplified. Further, the dimensions of the device are reduced.

Claims

1. A semiconductor device comprising:

a sensor element having a plate shape with a surface and including a sensor structure disposed in a surface portion of the sensor element; and

a plate-shaped cap element bonded to the surface of the sensor element, wherein;

the cap element has a wiring pattern portion facing the sensor element; and

the wiring pattern portion connects an outer periphery of the surface of the sensor element and the sensor structure so that the sensor structure is electrically coupled with an external element via the outer periphery.

2. The semiconductor device of claim 1, wherein:

the wiring pattern portion includes;

a first wiring layer for connecting the outer periphery of the surface of the sensor element and the sensor structure;

a first insulation film disposed on the first wiring layer, and having a first opening, which faces the sensor structure and the outer periphery of the surface of the sensor element so that the first wiring layer is exposed from the first insulation film in the first opening; and

a second wiring layer including a wiring part, which is disposed on the first wiring layer exposed from the first insulation film in the first opening;

the wiring part is coupled with the sensor structure; and

the wiring part is further coupled with the outer periphery of the surface of the sensor element.

3. The semiconductor device of claim 2, wherein:

the outer periphery of the sensor element includes a peripheral portion, which surrounds the sensor structure;

the second wiring layer further includes a hermetically sealing part, which has a ring shape and faces the peripheral portion;

the hermetically sealing part is disposed on the first insulation film so that the hermetically sealing part is electrically insulated from the first wiring layer; and

the hermetically sealing part is bonded to the peripheral portion so that the sensor structure is sealed and accommodated in a space defined by the cap element and the sensor element.

4. The semiconductor device of claim 2, wherein:

the outer periphery of the sensor element further includes a connection portion for connecting a wire to the external element;

the connection portion is disposed on an outside of the peripheral portion; and

the wiring part is bonded to the connection portion so that the sensor structure is coupled with the external element via the connection portion and the wire.

5. The semiconductor device of claim 2, wherein:

the wiring part contacts a wire for connecting the external element so that the sensor structure is coupled with the external element via the wiring part and the wire.

6. The semiconductor device of claim 2, further includes:

a bump for flip-chip mounting, wherein;

the outer periphery of the sensor element further includes a connection portion;

the connection portion is disposed on an outside of the peripheral portion; and

the bump is bonded to the connection portion.

7. The semiconductor device of claim 1, wherein:

the cap element further includes an IC circuit portion, which is disposed in a surface portion of the cap element and opposite to the sensor element.

8. The semiconductor device of claim 1, wherein:

the cap element further includes an IC circuit portion, which is disposed in a surface portion of the cap element and faces the sensor element.

9. The semiconductor device of claim 2, wherein:

the first insulation film further has another first opening, which faces the sensor structure and the outer periphery of the surface of the sensor element so that the first wiring layer is exposed from the first insulation film in the another first opening;

the second wiring layer further includes another wiring part, which is disposed on the first wiring layer exposed from the first insulation film in the another first opening;

the another wiring part is coupled with the sensor structure;

the another wiring part is further coupled with the outer periphery of the surface of the sensor element; and

the wiring part is directed to one direction, which is different from the another wiring part.

10. The semiconductor device of claim 2, wherein:

the cap element further includes a recessed part, which faces at least the sensor structure, and is not disposed on the wiring part.

11. The semiconductor device of claim 3, wherein:

the cap element has a silicon substrate, a second insulation film on the silicon substrate and a first conduction contact portion;

the second insulation film has a second opening for exposing the silicon substrate via the second opening;

the first conduction contact portion is disposed in the second opening, and electrically connects the silicon substrate and the first wiring layer;

the wiring pattern portion further includes a second conduction contact portion, which is disposed in the first opening;

the second conduction contact portion electrically connects the first wiring layer and the hermetically sealing part; and

the silicon substrate electrically connects the peripheral portion of the sensor element via the first conduction contact portion, the first wiring layer, the second conduction contact portion and the hermetically sealing part.

12. The semiconductor device of claim 11, wherein:

the sensor element has an SOI substrate comprising a first silicon layer, a second silicon layer and an insulation layer;

the sensor structure is disposed in the first silicon layer;

the insulation layer is sandwiched between the first silicon layer and the second silicon layer;

the peripheral portion is disposed in the first silicon layer;

the insulation layer has a third opening, in which a substrate contact part is disposed; and

the substrate contact part is disposed between the peripheral portion and the second silicon layer to electrically connect the peripheral portion and the second silicon layer.

13. The semiconductor device of claim 12, wherein:

the sensor element has a third wiring layer on the first silicon layer; and

the cap element is bonded to the third wiring layer.

14. The semiconductor device of claim 2, wherein:

the sensor structure includes a movable electrode movable within the sensor element;

the first wiring layer faces the movable electrode; and

the sensor element detects distance change between the first wiring layer and the movable electrode so that the sensor element detects acceleration in a direction perpendicular to the surface of the sensor element.

15. The semiconductor device of claim 14, wherein:

the wiring pattern portion further includes a counter electrode;

the counter electrode is disposed on the first insulation film, and faces the movable electrode; and

the sensor element detects distance change between the movable electrode and the counter electrode, which corresponds to the distance change between the first wiring layer and the movable electrode.

16. A semiconductor device comprising:

a first chip having a plate shape with a first surface and including a first IC circuit portion, which is disposed in a first surface portion of the first chip; and

a second chip having a plate shape with a second surface and including a second IC circuit portion, which is disposed in a second surface portion of the second chip, wherein;

the first chip further includes a first wiring pattern portion comprising a first insulating film, a first wiring layer, a second insulating film and a second wiring layer;

the first insulating film is disposed on the first IC circuit portion;

the first wiring layer is patterned on the first insulating film and coupled with the first IC circuit portion;

the second insulating film is disposed on the first wiring layer;

the second insulating film has a first opening so that the first wiring layer is exposed from the second insulating film via the first opening;

the second wiring layer is disposed on the first wiring layer exposed in the first opening;

the second chip includes a second wiring pattern portion comprising a third insulating film, a third wiring layer, a fourth insulating film and a fourth wiring layer;

the third insulating film is disposed on the second IC circuit portion;

the third wiring layer is patterned on the third insulating film and coupled with the second IC circuit portion;

the fourth insulating film is disposed on the third wiring layer;

the fourth insulating film has a second opening so that the third wiring layer is exposed from the fourth insulating film via the second opening;

the fourth wiring layer is disposed on the third wiring layer exposed from the second opening;

the surface of the first chip faces the surface of the second chip; and

the second wiring layer of the first wiring pattern portion of the first chip and the fourth wiring layer of the second wiring pattern portion of the second chip are bonded to each other.

17. The semiconductor device of claim 16, wherein:

the first wiring pattern portion further includes a first hermetically sealing part on the second insulating film, and the second wiring pattern portion further includes a second hermetically sealing part on the fourth insulating film;

each of the first and second hermetically sealing parts has an annular shape;

the first hermetically sealing part is electrically insulated from the first wiring layer, and has a height equal to the second wiring layer;

the second hermetically sealing part is electrically insulated from the third wiring layer, and has a height equal to the fourth wiring layer; and

the first hermetically sealing part of the first chip and the second hermetically sealing part of the second chip are bonded to each other for sealing a space defined by the first and second hermetically sealing parts, the first and second insulating films, and the third and fourth insulating films.

18. A method for manufacturing a semiconductor device, the method comprising:

preparing a sensor element having a plate shape with a surface, and forming a sensor structure in a surface portion of the sensor element;

preparing a plate-shaped cap element having a wiring pattern portion, and patterning the wiring pattern portion to bond with the sensor element in such a manner that an outer periphery of the surface of the sensor element is connected to the sensor structure with the wiring pattern portion; and

bonding the cap element and the sensor element to connect the wiring pattern portion to the sensor structure.

20. The method of claim 18, wherein:

the preparing the cap element includes;

forming a first wiring layer on the cap element, and patterning the first wiring layer to connect the outer periphery of the surface of the sensor element and the sensor structure;

forming a first insulation film on the first wiring layer, and forming an opening in the first insulation film, the opening facing the sensor structure and the outer periphery of the surface of the sensor element to expose the first wiring layer via the opening; and

forming a second wiring layer with a wiring part on the first wiring layer exposed from the first insulation film in the opening.

21. The method of claim 20, wherein:

the preparing the sensor element includes forming a peripheral portion on the surface of the sensor element to surround the sensor structure;

the preparing the cap element includes forming a hermetically sealing part having an annular shape on the first insulation film, the hermetically sealing part which faces the peripheral portion, and is electrically insulated from the first wiring layer; and

the bonding the cap element and the sensor element includes;

bonding the hermetically sealing part to the peripheral portion; and

sealing the sensor structure in a space defined by the cap element and the sensor element.

19. A method for manufacturing semiconductor devices, the method comprising:

preparing a sensor wafer having a plurality of sensor elements, each of which has a plate shape with a surface, and forming a sensor structure in a surface portion of each sensor element;

preparing a cap wafer having a plurality of plate-shaped cap elements, each of which has a wiring pattern portion to be bonded to a respective sensor element, and patterning each of the wiring pattern portions to connect an outer periphery of a respective sensor element and a respective sensor structure;

bonding the sensor wafer and the cap wafer to connect each wiring pattern portion to a respective sensor structure; and

dividing the cap wafer and the sensor wafer into a plurality of sensor chips.

22. A method for manufacturing a semiconductor device, the method comprising:

preparing a first chip having a plate shape with a surface, forming a first IC circuit portion in a surface portion of the first chip, and forming a first wiring pattern portion on the first IC circuit portion, the first wiring pattern portion comprising a first insulating film, a first wiring layer, a second insulating film and a second wiring layer, wherein the first insulating film is formed on the first IC circuit portion, the first wiring layer is patterned on the first insulating film to be connected to the first IC circuit portion, the second insulating film is formed on the first wiring layer and has a first opening to expose the first wiring layer via the first opening, and the second wiring layer is formed on the first wiring layer exposed from the second insulating film via the opening;

preparing a second chip having a plate shape with a surface, forming a second IC circuit portion in a surface portion of the second chip, and forming a second wiring pattern portion on the second IC circuit portion, the second wiring pattern portion comprising a third insulating film, a third wiring layer, a fourth insulating film and a fourth wiring layer, wherein the third insulating film is formed on the second IC circuit portion, the third wiring layer is patterned on the third insulating film to be connected to the second IC circuit portion, the fourth insulating film is formed on the third wiring layer and has a second opening to expose the third wiring layer via the second opening, and the fourth wiring layer is formed on the third wiring layer exposed from the fourth insulating film via the second opening; and

facing the surface of the first chip and the surface of the second chip, and bonding the second wiring layer of the first wiring pattern portion of the first chip and the fourth wiring layer of the second wiring pattern portion of the second chip.