Structure and manufactruing method of chip scale package

• US 20090008778A1
• Filed: 09/09/2008
• Published: 01/08/2009
• Est. Priority Date: 03/30/2001
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Megica Corporation (Chipbond Technology Corporation)
• Inventors: Lin, Mou-Shiung, Lee, Jin-Yuan, Huang, Ching-Cheng
• Granted Patent: US 9,018,774 B2
• Time in Patent Office: Days
• US Class Current: 257/738
• CPC Class Codes: H01L 2224/02377 Fan-in arrangement
• CPC Class Codes: H01L 2224/05124 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/05155 Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/05647 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/13 of an individual bump connector
• CPC Class Codes: H01L 2224/13099 Material
• CPC Class Codes: H01L 2224/13111 Tin [Sn] as principal constituent
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/81801 Soldering or alloying
• CPC Class Codes: H01L 2224/85399 Material
• CPC Class Codes: H01L 23/293 Organic, e.g. plastic
• CPC Class Codes: H01L 23/3114 the device being a chip scale package, e.g. CSP
• CPC Class Codes: H01L 23/49827 Via connections through the substrates, e.g. pins going through the substrate, coaxial cables H01L23/49822, H01L23/49833, H01L23/4985, H01L23/49861 take precedence
• CPC Class Codes: H01L 24/10 Bump connectors bumps on insulating substrates, e.g. chip carriers, H01L23/49816; Manufacturing methods related thereto
• CPC Class Codes: H01L 24/13 of an individual bump connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/81 : using a bump connector
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01075 : Rhenium [Re]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/10253 : Silicon [Si]
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/207 : Diameter ranges

Abstract

A Chip Scale Package (CSP) and a method of forming the same are disclosed. Single chips without the conventional ball mountings, are first attached to an adhesive-substrate (adsubstrate) composite having openings that correspond to the input/output (I/O) pads on the single chips to form a composite chip package. Ball mounting is then performed over the openings, thus connecting the I/O pads at the chip sites to the next level of packaging directly. In another embodiment, the adhesive layer is formed on the wafer side first to form an adwafer, which is then die sawed in CSPs. Then the CSPs with the adhesive already on them are bonded to a substrate. The composite chip package may optionally be encapsulated with a molding material. The CSPs provide integrated and shorter chip connections especially suited for high frequency circuit applications, and can leverage the currently existing test infrastructure.

Claims

1. A chip package comprising:

a substrate;

a die over said substrate, wherein a first opening through said substrate is under said die, and wherein said die comprises a contact pad and a passivation layer at a bottom side of said die, wherein a second opening in said passivation layer is under said contact pad, and said contact pad is at a top of said second opening;

an adhesive material between said substrate and said bottom side of said die;

a metal interconnect connected to said contact pad through said first and second openings; and

a molding material over a top side of said die and on said substrate, wherein said molding material has a left edge and a right edge substantially parallel with said left edge.

2. The chip package of claim 1, wherein said contact pad comprises copper.

3. The chip package of claim 1 further comprising a metal layer at a top of said first opening, under said contact pad and under said passivation layer, wherein said metal layer is connected to said contact pad through said second opening.

4. The chip package of claim 3, wherein said metal layer comprises copper.

5. The chip package of claim 3, wherein said metal layer comprises nickel.

6. The chip package of claim 1, wherein said molding material comprises a polymer.

7. The chip package of claim 1, wherein said substrate comprises bismaleimide triazine (BT).

8. A chip package comprising:

a substrate;

a die over said substrate, wherein a first opening through said substrate is under said die, and wherein said die comprises a copper layer, a metal pad and an insulating layer at a bottom side of said die, wherein a second opening in said insulating layer is under said copper layer, and said copper layer is at a top of said second opening, and wherein said metal pad is connected to said copper layer through said second opening, and said metal pad is at a top of said first opening;

an adhesive material between said substrate and said bottom side of said die;

a metal interconnect connected to said metal pad through said first opening; and

a molding material on said substrate, wherein said molding material has a left edge and a right edge substantially parallel with said left edge.

9. The chip package of claim 8, wherein said metal pad comprises copper.

10. The chip package of claim 8, wherein said metal pad comprises nickel.

11. The chip package of claim 8, wherein said molding material comprises a polymer.

12. The chip package of claim 8, wherein said substrate comprises bismaleimide triazine (BT).

13. The chip package of claim 8, wherein said metal pad is further in said second opening and on said insulating layer.

14. A chip package comprising:

a BGA substrate;

a die over said BGA substrate, wherein a first opening through said BGA substrate is under said die, and wherein said die comprises a contact pad and a passivation layer at a bottom side of said die, wherein a second opening in said passivation layer is under said contact pad, and said contact pad is at a top of said second opening;

an adhesive material between said BGA substrate and said bottom side of said die;

a metal interconnect connected to said contact pad through said first and second openings; and

a molding material over a top side of said die and on said BGA substrate, wherein said molding material has a left edge and a right edge substantially parallel with said left edge.

15. The chip package of claim 14, wherein said contact pad comprises copper.

16. The chip package of claim 14 further comprising a metal layer at a top of said first opening, under said contact pad and under said passivation layer, wherein said metal layer is connected to said contact pad through said second opening.

17. The chip package of claim 16, wherein said metal layer comprises copper.

18. The chip package of claim 16, wherein said metal layer comprises nickel.

19. The chip package of claim 14, wherein said molding material comprises a polymer.

20. The chip package of claim 14, wherein said BGA substrate comprises bismaleimide triazine (BT).