Active Matrix Substance and Display Device Including the Same

• US 20090009673A1
• Filed: 03/06/2006
• Published: 01/08/2009
• Est. Priority Date: 03/15/2005
• Status: Active Grant

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Hisada, Yuhko
• Granted Patent: US 7,612,839 B2
• Time in Patent Office: Days
• US Class Current: 349/39
• CPC Class Codes: G02F 1/13606 having means for reducing parasitic capacitance
• CPC Class Codes: G02F 1/1362 Active matrix addressed cells G02F1/134336, G02F1/134363 take precedence
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: G09G 2300/0443 with several sub-pixels for the same colour in a pixel, not specifically used to display gradations G09G3/364 takes precedence
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2300/0847 being a dynamic memory without any storage capacitor, i.e. with use of parasitic capacitances as storage elements
• CPC Class Codes: G09G 2310/0262 The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
• CPC Class Codes: G09G 2320/0209 Crosstalk reduction, i.e. to reduce direct or indirect influences of signals directed to a certain pixel of the displayed image on other pixels of said image, inclusive of influences affecting pixels in different frames or fields or sub-images which constitute a same image, e.g. left and right images of a stereoscopic display
• CPC Class Codes: G09G 2320/0233 Improving the luminance or brightness uniformity across the screen
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element
• CPC Class Codes: G09G 3/3614 Control of polarity reversal in general
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1255 integrated with passive devices, e.g. auxiliary capacitors
• CPC Class Codes: H01L 29/41733 for thin film transistors with insulated gate
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H10K 59/1213 the pixel elements being TFTs
• CPC Class Codes: H10K 59/131 Interconnections, e.g. wiring lines or terminals
• CPC Class Codes: H10K 59/35 comprising red-green-blue [RGB] subpixels

Abstract

It is possible to decrease block segmentation and flickering due to separate exposure in an active matrix substrate while avoiding decreased aperture ratio, increased parasitic capacity and complication in manufacturing process. A first pixel circuit and a second pixel circuit including a first-type TFT and a second-type TFT, respectively, are disposed alternately relative to each other in both directions of row and column in an active matrix substrate. In the first-type and the second-type TFTs, a pattern misalignment of the drain electrode with respect to the gate electrode in an up-down direction will increase/decrease a gate-drain parasitic capacity Cgd in reverse ways. By disposing these two types of TFTs in uniform dispersion, the increase/decrease in the parasitic capacity Cgd caused by pattern misalignment occurring at the time of manufacture are averaged.

Claims

1-13. -13. (canceled)

14. An active matrix substrate comprising:

a plurality of data signal lines;

a plurality of scanning signal lines intersecting with the data signal lines; and

a pixel array including a plurality of pixel circuits disposed in a matrix pattern correspondingly to the respective intersections defined by intersecting of the data signal lines and the scanning signal lines, each of the plurality of pixel circuits including;

a field-effect transistor having a source electrode connected, directly or via a predetermined element, with the data signal line which passes through a corresponding one of the intersections, and a gate electrode connected with the scanning signal line which passes through the corresponding intersection; and

a voltage holding electrode connected, directly or via a predetermined element, with a drain electrode of the field-effect transistor and constituting a voltage holding capacitor;

wherein

the pixel circuits in the pixel array include;

a first number of the pixel circuits whose field-effect transistor is provided by a first-type field-effect transistor which gives an increasingly large electrostatic capacitance between the drain electrode and the gate electrode in accordance with an increase in a positional shift between a pattern for the drain electrode and a pattern for the gate electrode in a predetermined direction; and

a second number, that is substantially the same as the first number, of the pixel circuits whose field-effect transistor is provided by a second-type field-effect transistor which gives an increasingly small electrostatic capacitance between the two electrodes in accordance with the increase in the positional shift in the predetermined direction; and

the pixel circuits including the first-type field-effect transistor and the pixel circuits including the second-type field-effect transistor are disposed in substantially uniform dispersion in the pixel array.

15. The active matrix substrate according to claim 14, wherein the first-type field-effect transistor has an increasingly large area of overlap between the gate electrode and the drain electrode via a predetermined insulation layer, in accordance with an increase in the positional shift in the predetermined direction in the first-type field-effect transistor, and the second-type field-effect transistor having an increasingly small area of overlap between the gate electrode and the drain electrode via a predetermined insulation layer, in accordance with the increase in the positional shift in the predetermined direction in the second-type field-effect transistor.

16. The active matrix substrate according to claim 14, wherein the area of overlap between the gate electrode and the drain electrode via the predetermined insulation layer in the first-type and the second-type field-effect transistors is not changed by a positional shift in a direction perpendicular to the predetermined direction.

17. The active matrix substrate according to claim 14, wherein the pixel circuit including the first-type field-effect transistor and the pixel circuit including the second-type field-effect transistor are disposed in alternation to each other by a predetermined quantity in a direction where the data signal lines extend, and in alternation to each other by a predetermined quantity in a direction where the scanning signal lines extend, in the pixel array.

18. The active matrix substrate according to claim 17, wherein the pixel circuit including the first-type field-effect transistor and the pixel circuit including the second-type field-effect transistor are disposed in alternation to each other by a quantity of one in a direction where the data signal lines extend and in a direction where the scanning signal lines extend, in the pixel array.

19. The active matrix substrate according to claim 17, wherein the pixel circuit including the first-type field-effect transistor and the pixel circuit including the second-type field-effect transistor are disposed in alternation to each other by a quantity of one in a direction where the data signal lines extend, and by a quantity of two in a direction where the scanning signal lines extend, in the pixel array.

20. The active matrix substrate according to claim 17, wherein the pixel circuit including the first-type field-effect transistor and the pixel circuit including the second-type field-effect transistor are disposed in alternation to each other by a quantity of two in a direction where the data signal lines extend, and by a quantity of one in a direction where the scanning signal lines extend, in the pixel array.

22. The active matrix substrate according to claim 14, wherein the field-effect transistor is provided by a thin-film transistor.

23. A display device comprising a display panel including the active matrix substrate according to claim 22.

24. A display device comprising a display panel including the active matrix substrate according to claim 14.

25. A display device comprising:

a liquid crystal display panel which includes the active matrix substrate according to claim 14; and

a drive circuit arranged to drive the liquid crystal display panel such that there is a dispersed distribution in the pixel array of positive and negative polarities of the voltage held in the voltage holding capacitor in the pixel circuits in each frame of display made in the liquid crystal display panel;

wherein

of the same-polarity pixel circuits whose voltage holding capacitors hold voltages of a same polarity in a given frame of display made in the liquid crystal display panel, the pixel circuits including the first-type field-effect transistor and the pixel circuits including the second-type field-effect transistor are disposed in substantially uniform dispersion in the pixel array.

26. A display device comprising:

a color, liquid crystal display panel which includes the active matrix substrate according to claim 14; and

a drive circuit arranged to drive the liquid crystal display panel such that there is a dispersed distribution in the pixel array of positive and negative polarities of the voltage held in the voltage holding capacitor in the pixel circuits in each frame of display made in the liquid crystal display panel;

wherein

of the same-polarity pixel circuits whose voltage holding capacitors hold voltages of a same polarity in a given frame of display made in the liquid crystal display panel, the pixel circuits including the first-type field-effect transistor and the pixel circuits including the second-type field-effect transistor are disposed in substantially uniform dispersion in each pixel circuit group for formation of pixels which represent one of the three primary colors for color display.

21. An active matrix substrate comprising:

a plurality of data signal lines;

a plurality of scanning signal lines intersecting with the data signal lines; and

a pixel array including a plurality of pixel circuit pairs disposed in a matrix pattern correspondingly to the respective intersections defined by intersecting of the data signal lines and the scanning signal lines, each of the pixel circuit pairs includes two pixel circuits sandwiching the scanning signal line which passes through a corresponding one of the intersections;

wherein

each of the two pixel circuits includes;

a field-effect transistor having a source electrode connected, directly or via a predetermined element, with the data signal line which passes through the corresponding intersection, and a gate electrode connected with the scanning signal line which passes through the corresponding intersection; and

a voltage holding electrode connected, directly or via a predetermined element, with a drain electrode of the field-effect transistor and constituting a voltage holding capacitor; and

one of the two pixel circuits is provided by a pixel circuit whose field-effect transistor is provided by a first-type field-effect transistor which gives an increasingly large electrostatic capacitance between the drain electrode and the gate electrode in accordance with an increase in a positional shift between a pattern for the drain electrode and a pattern for the gate electrode in a predetermined direction; and

the other of the two pixel circuits is provided by a pixel circuit whose field-effect transistor is provided by a second-type field-effect transistor which gives an increasingly small electrostatic capacitance between the two electrodes in accordance with the increase in the positional shift in the predetermined direction.