Modulation Scheme for Communication Environments

• US 20090010318A1
• Filed: 05/18/2005
• Published: 01/08/2009
• Est. Priority Date: 05/18/2005
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Belogolovyi, Andrey V., Chernyshev, Vladislav A., Taubin, Felix A.
• Granted Patent: US 7,778,334 B2
• Time in Patent Office: Days
• US Class Current: 375/222
• CPC Class Codes: H04B 14/023 using pulse amplitude modulation
• CPC Class Codes: H04L 25/4917 using multilevel codes

Abstract

According to an aspect of the present invention, a symbol corresponding to a combination may be determined from a symbol set comprising at least sixteen PAM symbols. A sample such as a pulse may be generated based on the symbol value and a train of such pulses may be transmitted at a rate of at least 10 giga bits per second over a communication medium comprising, for example, a twisted copper cable. The received signal may be demodulated based on the empirically determined reliability values.

Claims

1. A method comprising:

producing a combination by selecting a pre-determined number of bits from two or more bit streams;

determining a symbol corresponding to the combination from a symbol set comprising at least sixteen symbols; and

transmitting a signal corresponding to the symbol at a rate of at least 10 giga bits per second over a communication medium.

2. The method of claim 1 a first bit stream comprises N bits and a second bit stream comprises N/3 bits.

3. The method of claim 2 the N bits are generated by encoding K bits using low density parity check coding technique.

4. The method of claim 1 the combination comprises four bits wherein one bit is selected from the N/3 bits and three bits is selected from the N bits, wherein the number of bits of the combination is based on an allowable bit error rate at a measured value of signal-to-noise ratio of the communication medium.

5. The method of claim 1 determining the symbol comprises selecting the symbol based on a bit-to-symbol mapping table.

6. The method of claim 5 the selecting comprises searching for a matching entry corresponding to the combination and producing the symbol corresponding to the matching entry.

7. The method of claim 1 further comprising:

generating a coded bit stream and an un-coded bit stream from a received signal;

decoding a coded bit stream to generate an extracted bit stream based on the reliability assignment values determined empirically,

generating a bit stream representing data, and

sending the bit stream.

8. The method of claim 7 the reliability assignment values are chosen based on the bit position of the coded bit stream corresponding to the symbol being decoded and one or more pre-defined reliability assignment values.

9. An apparatus comprising:

a transmitter to produce a combination by selecting a pre-determined number of bits from one or more bit streams, to determine a symbol corresponding to the combination from a symbol set, wherein the symbol set comprises at least sixteen symbols;

a receiver to demodulate based on a reliability assignment, and

a front end device to transmit a signal corresponding to the symbol at a rate of at least 10 giga bits per second over a communication medium.

10. The apparatus of claim 9 wherein the transmitter comprises a mapper to receive a first bit stream comprising N bits and a second bit stream comprising N/3 bits.

11. The apparatus of claim 10 further comprises an encoder to generate N bits by encoding K bits using low density parity check coding technique.

12. The apparatus of claim 9 the transmitter comprises the mapper to generate the combination by selecting one bit out of the N/3 bits and three bits out of the N bits, wherein the number of bits of the combination is based on an allowable bit error rate at a measured value of signal-to-noise ratio of the communication medium.

13. The apparatus of claim 9 the transmitter comprises the mapper to determine the symbol by selecting the symbol based on the bit-to-symbol mapping table.

14. The apparatus of claim 13 the mapper to select the symbol comprises a content addressable memory to search a matching entry corresponding to the combination and to produce the symbol corresponding to the matching entry.

15. The apparatus of claim 9 the receiver further comprising:

a de-mapper to generate a coded bit stream and an un-coded bit stream from a received signal;

a decoder to decode a coded bit stream to generate an extracted bit stream based on the reliability assignment values determined empirically, and

a de-framer to generate a bit stream representing data.

16. The apparatus of claim 15 the reliability assignment values are chosen based on the bit position of the coded bit stream corresponding to the symbol being decoded and one or more pre-defined reliability assignment values.

17. The apparatus of claim 9 corresponds to a transceiver.

18. A system comprising:

a network interface to generate and transfer a signal that is representative of a bit stream and that comprises symbols selected from at least one of sixteen symbols,

a processor to provide the network interface with the bit stream in response to executing instructions;

a memory to store the instructions executed by the processor.

19. The system of claim 18 wherein the network interface is to generate the signal as an amplitude modulated signal having a rate of at least 10 giga bits per second.

20. The system of claim 19 the network interface further comprising a transmitter to produce a combination by selecting a pre-determined number of bits from one or more bit streams, to determine the symbol corresponding to the combination from a symbol set, wherein the symbol set comprises at least sixteen symbols;

and

a front end device to transmit the signal corresponding to the symbol at a rate of at least 10 giga bits over the communication medium.

21. The system of claim 20 wherein the transmitter comprises a mapper to receive a first bit stream comprising N bits and a second bit stream comprising N/3 bits.

22. The system of claim 20 the transmitter comprises the mapper to generate the combination by selecting one bit out of the N/3 bits and three bits out of the N bits.

23. The system of claim 20 the transmitter comprises the mapper to determine the symbol by selecting the symbol based on the bit-to-symbol mapping table.

24. The system of claim 20 the mapper to select the symbol comprises a content addressable memory to search a matching entry corresponding to the combination and to produce the symbol corresponding to the matching entry.

25. The system of claim 19 the network interface further comprises a receiver comprising:

a de-mapper to generate a coded bit stream and an un-coded bit stream from a received signal;

a decoder to decode a coded bit stream to generate an extracted bit stream based on the reliability assignment values determined empirically, and

a de-framer to generate a bit stream representing data.

26. The system of claim 19 the network interface includes a network interface card.

27. The system of claim 26 the network interface card includes logic capable of communicating at least in accordance with 10GBase-T standard.

28. The system of claim 18 the system further includes at least one of a computer, a switch, a router, or a server.