CIRCUIT SIMULATION
First Claim
1. A method, comprising:
- creating one or more data structures sufficient to model an electronic circuit as a collection of n elements consisting of;
zero or more LRV elements, each having at least one of (a) a non-zero inductance parameter Lbr, (b) a non-zero resistance parameter rbr, or (c) a non-zero voltage source parameter ebr, but neither a non-zero capacitance parameter, nor a non-zero current source parameter, nor a switch parameter;
zero or more CRI elements, each having at least one of (a) a non-zero capacitance parameter Cbr, (b) a non-zero resistance parameter rbr, or (c) a non-zero current source parameter jbr, but neither a non-zero inductance parameter, nor a non-zero voltage source parameter, nor a switch parameter; and
zero or more switching elements, each having a switch state and neither a non-zero inductance parameter, a non-zero capacitance parameter, a non-zero resistance parameter, a non-zero voltage source parameter, nor a non-zero current source parameter; and
automatically generating a first set of state equations from said one or more data structures; and
simulating operation of the electronic circuit by application of said first set of state equations;
wherein n is at least two, and the collection comprises eitheran LRV element for which at least two of Lbr, rbr, or ebr are non-zero, ora CRI element for which at least two of Cbr, rbr, or jbr are non-zero.
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Abstract
A system, method, and apparatus select state variables for, build state equations of, and simulate time-domain operation of an electronic circuit. The circuit is modeled with three branch types (inductor, resistor, voltage source in series; capacitor, resistor, current source in parallel; and switch), including four pre-defined switch types (unidirectional unlatched, bidirectional unlatched, unidirectional latched, and bidirectional latched). Automated analyses determine efficient state variables based on the currently active circuit topology, and state equations are built and applied. Switching logic determines when switch states change, and state equations for the new topology are either drawn from a cache (if the topology has already been processed) or derived anew. The switch control signals may be combined into a single switching variable, defined as a function of the state output.
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Citations
16 Claims
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1. A method, comprising:
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creating one or more data structures sufficient to model an electronic circuit as a collection of n elements consisting of; zero or more LRV elements, each having at least one of (a) a non-zero inductance parameter Lbr, (b) a non-zero resistance parameter rbr, or (c) a non-zero voltage source parameter ebr, but neither a non-zero capacitance parameter, nor a non-zero current source parameter, nor a switch parameter; zero or more CRI elements, each having at least one of (a) a non-zero capacitance parameter Cbr, (b) a non-zero resistance parameter rbr, or (c) a non-zero current source parameter jbr, but neither a non-zero inductance parameter, nor a non-zero voltage source parameter, nor a switch parameter; and zero or more switching elements, each having a switch state and neither a non-zero inductance parameter, a non-zero capacitance parameter, a non-zero resistance parameter, a non-zero voltage source parameter, nor a non-zero current source parameter; and automatically generating a first set of state equations from said one or more data structures; and simulating operation of the electronic circuit by application of said first set of state equations; wherein n is at least two, and the collection comprises either an LRV element for which at least two of Lbr, rbr, or ebr are non-zero, or a CRI element for which at least two of Cbr, rbr, or jbr are non-zero. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A method, comprising:
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creating one or more data structures that together store characteristics of a plurality of active branches Bactive that make up a graph of nodes and branches that form a circuit, wherein Bactive consists of a set BL of zero or more inductive branches, each having a non-zero inductive component but neither a capacitive component nor a variable switch state; a set BC of zero or more capacitive branches, each having a non-zero capacitive component but neither an inductive component nor a variable switch state; and a set BA of additional branches, each having neither an inductive component, nor a capacitive component; partitioning Bactive into a first branch set Btreeactive and a second branch set Blinkactive, where the branches in Btreeactive form a spanning tree over Bactive, giving priority in said partitioning to branches not in BL over branches in BL; sub-partitioning Blinkactive into a third branch set BlinkL and a fourth branch set BlinkCA, where BlinkL=Blinkactive∩
BL;identifying a fifth branch set BCA as the union of BlinkCA, BC∩
Btreeactive, andthose branches in Btreeactive that form a closed graph when combined with BlinkCA; partitioning BCA into a sixth branch set {tilde over (B)}treeCA and a seventh branch set {tilde over (B)}linkCA where the branches in {tilde over (B)}treeCA form a spanning tree over BCA, giving priority in said partitioning to branches in BC over branches not in BC; identifying an eighth branch set BtreeC={tilde over (B)}treeCA∩
BC;selecting a set of state variables comprising; for each branch of BlinkL, either the inductor current or inductor flux, and for each branch of BtreeC either the capacitor voltage or capacitor charge; and simulating a plurality of states of the circuit using the set of state variables. - View Dependent Claims (9, 10)
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11. A system, comprising a processor and a computer-readable medium in communication with said processor, said medium containing programming instructions executable by said processor to:
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build state equations for a first topology of an electronic circuit having at least two switching elements, wherein each switching element has a switching state; solve said state equations at time ti to provide a state output vector, in which at least two elements control the switching states of the switching elements; calculate the value of a switching variable as a function of the state output vector, wherein the value reflects whether the switching state of at least one of the switching elements is changing; and if the value of the switching variable at time ti indicates that at least one of the switching elements is changing, determine a second topology of the electronic circuit for time ti+ and obtain state equations for the second topology. - View Dependent Claims (12, 13, 14, 15)
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16. A system for simulating electronic circuits, comprising a processor and a computer-readable medium in communication with said processor, said medium containing programming instructions executable by said processor to read element parameters and node connection information from a data stream comprising at least one switch type specification, the at least one switch type specification being selected from the group consisting of:
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a unidirectional, unlatched switch; a bidirectional, unlatched switch; a unidirectional, latched switch; and a bidirectional, latched switch; and wherein said instructions are further executable by said processor automatically to calculate state equations for the circuit given the states of switches specified by said at least one switch type specification.
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Specification