VIDEO SIGNAL ANALYZER

• US 20090013372A1
• Filed: 07/06/2007
• Published: 01/08/2009
• Est. Priority Date: 07/06/2007
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Apple Inc.
• Inventors: Oakes, Stephen Robert, Fusselman, Thomas Eugene
• Granted Patent: US 8,324,909 B2
• Time in Patent Office: Days
• US Class Current: 725/139
• CPC Class Codes: H04N 21/4143 embedded in a Personal Computer [PC]
• CPC Class Codes: H04N 21/4312 involving specific graphical features, e.g. screen layout, special fonts or colors, blinking icons, highlights or animations
• CPC Class Codes: H04N 21/4314 for fitting data in a restricted space on the screen, e.g. EPG data in a rectangular grid
• CPC Class Codes: H04N 21/43632 involving a wired protocol, e.g. IEEE 1394 high-speed IEEE 1394 serial bus H04L12/40052
• CPC Class Codes: H04N 21/44008 involving operations for analysing video streams, e.g. detecting features or characteristics in the video stream arrangements characterised by components specially adapted for monitoring, identification or recognition of video in broadcast systems H04H60/59
• CPC Class Codes: H04N 21/64746 Control signals issued by the network directed to the server or the client

Abstract

Methods, systems, and apparatus, including computer program products, for analyzing video signals. An apparatus includes a video interface operable to receive a video signal, a network interface operable to receive a test parameter from a network source, and a processor operable to couple to the video interface and the network interface and to perform a test on a video signal received from the video interface in accordance with the test parameter

Claims

1. An apparatus comprising:

a video interface operable to receive a video signal;

a network interface operable to receive a test parameter from a network source; and

a processor operable to couple to the video interface and the network interface, and to perform a test on a video signal received from the video interface in accordance with the test parameter.

2. The apparatus of claim 1, where the video interface is operable to receive video signals having different video signal formats.

3. The apparatus of claim 1, comprising a plurality of video interfaces operable to receive respective video signals;

and wherein the processor is further operable to;

poll a first one of the plurality of video interfaces;

perform a test on a first video signal received from the first one of the plurality of video interfaces if any;

and if none, poll a second one of the plurality of video interfaces; and

perform a test on a second video signal received from the second one of the plurality of video interfaces.

4. The apparatus of claim 1, further comprising:

a combined video and audio interface operable to receive a combined video and audio signal; and

an audio interface operable to output an audio signal separated from the combined video and audio signal.

5. The apparatus of claim 4, wherein the combined video and audio interface comprises a High-Definition Multimedia Interface (HDMI) interface.

6. The apparatus of claim 1, further comprising an output video interface operable to output a video signal.

7. The apparatus of claim 6, wherein:

the output video signal is derived from the received video signal and is in a different format that the received video signal.

8. The apparatus of claim 6, wherein the output video interface comprises a Video Graphics Array (VGA) interface.

9. The apparatus of claim 1, wherein the video interface comprises one of the group consisting of:

a VGA interface, a component video interface, a S-video interface, a composite video interface, and a Digital Visual Interface (DVI) interface.

10. The apparatus of claim 1, wherein the processor comprises a programmable logic device.

11. The apparatus of claim 1, wherein the test comprises at least one of the group consisting of:

timing validation, cyclic redundancy check calculation, analog red-green-blue (RGB) amplitude validation, blanking region validation, phase calculation, subcarrier frequency validation, multiburst validation, differential gain validation, and color bar validation.

12. The apparatus of claim 1, wherein the processor is further operable to transmit a result of the test to the network source through the network interface.

13. The apparatus of claim 1, further comprising one or more indicators operable to give visual feedback of a result of the test.

14. A method, comprising:

receiving a test parameter from a network source;

receiving a video signal from a video interface; and

performing a test on the video signal in accordance with the received test parameter.

15. The method of claim 14, further comprising:

polling a first one of a plurality of video input interfaces;

receiving a first video signal from the first one of the video input interfaces;

performing a test on the first video signal;

polling a second one of the video input interfaces;

receiving a second video signal from the second one of the video input interfaces; and

performing the test on the second video signal.

16. The method of claim 14, further comprising outputting the video signal.

17. The method of claim 16, wherein outputting the video signal comprises:

converting the video signal from a first format into a second format; and

outputting the video signal in the second format.

18. The method of claim 14, further comprising:

receiving a combined video and audio signal;

separating the combined video and audio signal into a video signal and audio signal;

performing a test on the video signal.

19. The method of claim 18, further comprising outputting the audio signal.

20. The method of claim 14, further comprising transmitting a result of the test to the network source.