METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

• US 20090023261A1
• Filed: 06/24/2008
• Published: 01/22/2009
• Est. Priority Date: 07/20/2007
• Status: Active Grant

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Hirano, Tomoyuki
• Granted Patent: US 7,592,232 B2
• Time in Patent Office: Days
• US Class Current: 438/270
• CPC Class Codes: H01L 21/28123 Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects
• CPC Class Codes: H01L 29/66545 using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate
• CPC Class Codes: H01L 29/6656 using multiple spacer layers, e.g. multiple sidewall spacers
• CPC Class Codes: H01L 29/6659 with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
• CPC Class Codes: H01L 29/66606 with final source and drain contacts formation strictly before final or dummy gate formation, e.g. contact first technology H01L29/66621 takes precedence
• CPC Class Codes: H01L 29/7833 with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's for thin film transistors H01L29/78618
• CPC Class Codes: Y10S 438/954 Making oxide-nitride-oxide device

Abstract

A method for manufacturing a semiconductor device, includes the steps of forming a dummy gate insulating film and a dummy gate electrode, forming source and drain regions, forming a first insulating film, forming a second insulating film, removing the second insulating film, simultaneously removing the first insulating film and the second insulating film that remains, while planarizing the first insulating film and the second insulating film that remains, forming a gate electrode trench by removing the dummy gate electrode and the dummy gate insulating film, forming a gate insulating film, and forming a gate electrode, wherein a field effect transistor is formed by the method.

Claims

1. A method for manufacturing a semiconductor device, the method comprising the steps of:

forming a dummy gate insulating film and a dummy gate electrode over a semiconductor substrate having a channel forming region;

forming source and drain regions in the semiconductor substrate by using the dummy gate electrode as a mask;

forming a first insulating film by using an insulating material having higher resistance against a hydrofluoric acid than silicon oxide in such a way that the first insulating film has a thickness larger than a thickness of the dummy gate electrode and covers the dummy gate electrode;

forming a second insulating film on the first insulating film by using an insulating material different from the insulating material of the first insulating film;

removing the second insulating film from a top surface of the second insulating film until a top part of the first insulating film is exposed;

simultaneously removing the first insulating film and the second insulating film that remains, while planarizing the first insulating film and the second insulating film that remains, from a top surface of the first insulating film until the dummy gate electrode is exposed;

forming a gate electrode trench by removing the dummy gate electrode and the dummy gate insulating film;

forming a gate insulating film on a bottom of the gate electrode trench; and

forming a gate electrode by filling an inside of the gate electrode trench above the gate insulating film with an electrically-conductive material, wherein

a field effect transistor is formed by the method.

2. The method for manufacturing a semiconductor device according to claim 1, wherein

the first insulating film and the second insulating film that remains are removed by polishing in the step of simultaneously removing the first insulating film and the second insulating film that remains.

3. The method for manufacturing a semiconductor device according to claim 1, wherein

the second insulating film is removed by polishing in the step of removing the second insulating film.

4. The method for manufacturing a semiconductor device according to claim 1, further comprising the steps of, after the step of forming the dummy gate electrode and before the step of forming the source and drain regions:

forming an offset spacer on both sides of the dummy gate electrode;

forming an extension region in the semiconductor substrate by using the offset spacer and the dummy gate electrode as a mask; and

forming a sidewall spacer on both sides of the offset spacer, wherein

in the step of forming the source and drain regions, the sidewall spacer, the offset spacer, and the dummy gate electrode are used as a mask to thereby form the source and drain regions in the semiconductor substrate.

5. The method for manufacturing a semiconductor device according to claim 4, wherein

the gate electrode trench is formed in an area between a pair of the offset spacers in the step of forming the gate electrode trench.

6. The method for manufacturing a semiconductor device according to claim 1, wherein

the step of forming the gate electrode includes the sub-steps of:

depositing an electrically-conductive material inside and outside the gate electrode trench above the gate insulating film; and

removing the electrically-conductive material outside the gate electrode trench.

7. The method for manufacturing a semiconductor device according to claim 1, wherein

the dummy gate insulating film is removed by a chemical based on a hydrofluoric acid in the step of forming the gate electrode trench.

8. The method for manufacturing a semiconductor device according to claim 1, wherein

the first insulating film is formed by using an insulating material that contains any of silicon nitride, silicon nitride doped with boron, silicon carbide, silicon carbonitride, and silicon oxycarbide in the step of forming the first insulating film.