Mobile Radio Receiver Power Management Systems and Methods

• US 20090023416A1
• Filed: 07/20/2007
• Published: 01/22/2009
• Est. Priority Date: 07/20/2007
• Status: Active Grant

• Current Assignee: CRC Press, LLC, CF Crespe LLC (FIG LLC (d/b/a Fortress Investment Group LLC))
• Original Assignee: Cresta Technology Corporation
• Inventors: Haber, George T., Murgulescu, Mihai H.
• Granted Patent: US 8,442,476 B2
• Time in Patent Office: Days
• US Class Current: 455/343.300
• CPC Class Codes: H04B 1/16 Circuits
• CPC Class Codes: H04W 52/0277 according to available power supply, e.g. switching off when a low battery condition is detected
• CPC Class Codes: Y02D 30/70 in wireless communication networks

Abstract

According to some embodiments, an analog radio receiver circuit is configured alternatively in a full-power mode when the receiver is situated in a cradle and connected to an external power source, and in a power-saving mode when the receiver is not connected to the external power source. In the power-saving mode, a scaled-down power level is supplied to an analog radio signal processing circuit component such as an amplifier, filter, oscillator, or mixer. Scaling down the power supplied to analog circuit components allows reducing their power consumption, at the expense of degraded circuit performance (e.g. increased non-linearity and intermodulation, decreased filter selectivity). Switching between full-power and power-saving modes may be achieved by controlling the connection of internal nodes of the signal processing circuit to a power source, and/or inserting circuit components (e.g. resistors, active devices, filter poles) into the signal processing circuit.

Claims

1. A method of controlling a radio receiver comprising:

determining whether the radio receiver is connected to an external power source;

when the radio receiver is connected to the external power source, configuring the radio receiver in a full-power mode to supply a full power level to an analog circuit component of an analog signal processing circuit of the radio receiver; and

when the radio receiver is not connected to the external power source, configuring the radio receiver in a power-saving mode to supply a scaled-down power level to the analog circuit component.

2. The method of claim 1, wherein the analog circuit component comprises an amplification circuit.

3. The method of claim 1, wherein the analog circuit component comprises an oscillator circuit.

4. The method of claim 1, wherein the analog circuit component comprises a filter circuit.

5. The method of claim 1, wherein the analog circuit component comprises a mixer circuit.

6. The method of claim 1, further comprising switching between the full-power mode and the power-saving mode by inserting a resistor into the signal processing circuit to change a voltage of an internal node of the signal processing circuit.

7. The method of claim 1, further comprising switching between the full-power mode and the power-saving mode by activating the gate of a power control transistor to connect an internal node of the signal processing circuit to a power source.

8. The method of claim 1, further comprising switching between the full-power mode and the power-saving mode by activating the gate of a power control transistor to interconnect two internal nodes of the signal processing circuit.

9. The method of claim 1, further comprising switching between the full-power mode and the power-saving mode by inserting a circuit section including a set of active devices into the signal processing circuit.

10. The method of claim 9, wherein the analog circuit component comprises a filter circuit, and the circuit section comprises a filter pole.

11. The method of claim 1, wherein determining whether the radio receiver is connected to an external power source comprises determining whether the radio receiver is positioned in a receiver cradle.

12. A radio receiver comprising:

an analog radio receiver signal processing circuit configured to process a set of electric signals derived from a set of radio signals; and

a power control circuit connected to the signal processing circuit and configured to control a supply of a full power level to an analog circuit component of the signal processing circuit of the radio receiver when the radio receiver is connected to an external power source; and

control a supply of a scaled-down power level to the analog circuit component when the radio receiver is not connected to the external power source.

13. The receiver of claim 12, further comprising a power source detection circuit connected to the power control circuit and configured to determine whether the radio receiver is connected to the external power source, and to transmit to the power control circuit an indicator of whether the radio receiver is connected to the external power source.

14. The receiver of claim 12, wherein the analog circuit component comprises an amplification circuit.

15. The receiver of claim 12 wherein the analog circuit component comprises an oscillator circuit.

16. The receiver of claim 12, wherein the analog circuit component comprises a filter circuit.

17. The receiver of claim 12, wherein the analog circuit component comprises a mixer circuit.

18. The receiver of claim 12, further comprising a resistor insertable into the signal processing circuit under a control of the power control circuit to change a voltage of an internal node of the signal processing circuit.

19. The receiver of claim 12, further comprising a power control transistor configured to connect an internal node of the signal processing circuit to a power source under a control of the power control circuit.

20. The receiver of claim 12, further comprising a power control transistor configured to interconnect two internal nodes of the signal processing circuit under a control of the power control circuit.

21. The receiver of claim 12, further comprising a circuit section including a set of active devices insertable into the signal processing circuit under a control of the power control circuit.

22. The receiver of claim 21, wherein the analog circuit component comprises a filter circuit, and the circuit section comprises a filter pole.

23. A radio receiver comprising:

means for determining whether the radio receiver is connected to an external power source;

means for configuring the radio receiver to supply a full power level to an analog circuit component of a signal processing circuit of the radio receiver when the radio receiver is connected to the external power source; and

means for configuring the radio receiver to supply a scaled-down power level to the analog circuit component when the radio receiver is not connected to the external power source.

24. A method of controlling a performance of an analog radio receiver signal processing circuit, comprising:

determining whether a radio receiver including the signal processing circuit is connected to an external power source;

when the radio receiver is connected to the external power source, supplying a full power level to an analog circuit component of the signal processing circuit; and

when the radio receiver is not connected to the external power source, supplying a scaled-down power level to the analog component.

25. The method of claim 24, wherein the analog component comprises an amplification circuit.

26. The method of claim 24, wherein the analog component comprises an oscillator circuit.

27. The method of claim 24, wherein the analog component comprises a filter circuit.

28. The method of claim 24, wherein the analog component comprises a mixer circuit.

29. An integrated circuit comprising:

a signal processing circuit; and

a power control circuit connected to the signal processing circuit and configured to control a supply of a full power level to an analog circuit component of the signal processing circuit when the signal processing circuit is connected to an power source external to a radio receiver incorporating the integrated circuit; and

control a supply of a scaled-down power level to the analog circuit component when the signal processing circuit is not connected to the power source.

30. The integrated circuit of claim 29, wherein the analog circuit component comprises an amplification circuit.

31. The integrated circuit of claim 29, wherein the analog circuit component comprises an oscillator circuit.

32. The integrated circuit of claim 29, wherein the analog circuit component comprises a filter circuit.

33. The integrated circuit of claim 29, wherein the analog circuit component comprises a mixer circuit.

34. The integrated circuit of claim 29, further comprising a resistor insertable into the signal processing circuit under a control of the power control circuit to change a voltage of an internal node of the signal processing circuit.

35. The integrated circuit of claim 29, further comprising a power control transistor configured to connect an internal node of the signal processing circuit to a power source under a control of the power control circuit.

36. The integrated circuit of claim 29, further comprising a power control transistor configured to interconnect two internal nodes of the signal processing circuit under a control of the power control circuit.

37. The integrated circuit of claim 29, further comprising a circuit section including a set of active devices insertable into the signal processing circuit under a control of the power control circuit.

38. The integrated circuit of claim 37, wherein the analog circuit component comprises a filter circuit, and the circuit section comprises a filter pole.

39. An integrated circuit comprising:

means for determining whether a signal processing circuit is connected to an external power source;

means for supplying a full power level to an analog circuit component of the signal processing circuit when the signal processing circuit is connected to the external power source; and

means for supplying a scaled-down power level to the analog component when the signal processing circuit is not connected to the external power source.