Method and System for GRR Testing

• US 20090024324A1
• Filed: 07/20/2007
• Published: 01/22/2009
• Est. Priority Date: 07/20/2007
• Status: Abandoned Application

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Simpson, Don Lloyd, Leung, Nelson Kei Wai, Dirige, Gary Glenn R., Whitfield, Martin Thomas, Clark, Douglas W.
• Application Number:
  US11/781,110
• Publication Number:
  US 20090024324A1
• Time in Patent Office: Days
• US Class Current: 702/1
• CPC Class Codes: G01R 31/2893 Handling, conveying or loading, e.g. belts, boats, vacuum fingers G01R31/2867 takes precedence; handling semiconductor devices or wafers during manufacture or treatment H01L21/67

Abstract

A method and a system for automatically performing gauge repeatability and reproducibility (GRR) tests is provided. A handler is used to automatically move semiconductor devices from a device tray or other storage device into position for testing. When operating in a GRR mode, the handler is configured to place each of the semiconductor devices being tested in each possible testing position. A series of tests is performed on each of the semiconductor devices being tested in each of the possible testing positions. Furthermore, the series of tests may be repeated multiple times for each of the semiconductor devices in each position. In this embodiment, it is preferred that the semiconductor devices be reseated after each completing each series of tests. The semiconductor devices may be individual dies, systems on chips, multi-chip modules, or wafers.

Claims

1. A method of testing semiconductor devices, the method comprising:

providing a plurality of semiconductor devices in a device tray;

automatically moving a first subset of the plurality of semiconductor devices from the device tray to a load board, the first subset of the plurality of semiconductor devices being arranged in a first arrangement in the load board, the load board having multiple test sites;

performing a set of tests on the first subset of the plurality of semiconductor devices;

automatically rearranging the first subset of the plurality of semiconductor devices from the first arrangement to a second arrangement; and

repeating the one or more tests.

2. The method of claim 1, wherein the performing a set of tests is repeated multiple times on the first subset of the plurality of semiconductor devices in the first arrangement.

3. The method of claim 2, further comprising reseating the first subset of the plurality semiconductor devices between performing the set of tests.

4. The method of claim 1, wherein the repeating the one or more tests is repeated until each semiconductor device of the first subset is tested each of the test sites of the load board.

5. The method of claim 1, wherein the automatically rearranging is performed at least in part by a handler communicatively coupled to a controller, the handler automatically removing the first subset of the plurality of semiconductor devices from the load board and inserting the first subset of the plurality of semiconductor devices into the load board in the second arrangement.

6. The method of claim 5, further comprising temporarily placing the first subset of the plurality of semiconductor devices in a DUT transport between the automatically removing and the inserting.

7. The method of claim 1, wherein the semiconductor devices comprise individual dies.

8. The method of claim 1, wherein the semiconductor devices comprise wafers, each wafer having a plurality of semiconductor dies.

9. A test system comprising:

a controller communicatively coupled to a handler;

an IC tester communicatively coupled to the controller, the IC tester being configured to test a semiconductor device in a plurality of positions; and

a handler communicatively coupled to at least one of the controller and the IC tester, at least one of the controller and IC tester providing instructions to the handler to automatically retrieve each of a plurality of semiconductor devices for testing by the IC tester in each available position.

10. The test system of claim 9, wherein the IC tester is configured to repeat a series of tests multiple times on each of the plurality of semiconductor devices in each position.

11. The test system of claim 10, wherein the handler is further configured to reseat each of the plurality of semiconductor devices between each series of tests.

12. The test system of claim 9, wherein the semiconductor device comprises an individual die.

13. The test system of claim 9, wherein the semiconductor device comprises a wafer, each wafer having a plurality of semiconductor dies.

14. The test system of claim 9, wherein the semiconductor device includes multiple semiconductor dies.

15. A computer program product for testing a plurality of semiconductor devices, the computer program product having a medium with a computer program embodied thereon, the computer program product comprising:

(A) computer program code for causing a handler to move a first set of the semiconductor devices from a first arrangement at a first location to a second arrangement at a second location, the second location having a plurality of test sites;

(B) computer program code for removing the first set of semiconductor devices from the second location and replacing the first set of semiconductor devices in the second location;

(C) computer program code for moving the first set of semiconductor devices from the second arrangement to a third arrangement at the second location; and

(D) computer program code for repeating (B)-(C) until each of the first set of semiconductor devices have been tested in each of the plurality of test sites.

16. The computer program product of claim 15, wherein the moving comprises computer program code for temporarily placing the first set of semiconductor devices in a DUT transport.

17. The computer program product of claim 15, further comprising computer program code for performing a series of tests on the first set of semiconductor devices in each arrangement.

18. The computer program product of claim 17, wherein the computer program code for performing is performed multiple times.

19. The computer program product of claim 18, wherein the computer program code for removing and replacing is performed after each series of tests.

20. The computer program product of claim 19, wherein the computer program code for repeating (A)-(C) continues regardless of results of the performing a series of tests.