Trench MOSFET with multiple P-bodies for ruggedness and on-resistance improvements

• US 20090026533A1
• Filed: 07/24/2007
• Published: 01/29/2009
• Est. Priority Date: 07/24/2007
• Status: Abandoned Application

• Current Assignee: Force-Mos Technology Corporation (Force Mos Technology Co., Ltd.)
• Original Assignee: Force-Mos Technology Corporation (Force Mos Technology Co., Ltd.)
• Inventors: Hshieh, Fwu-Iuan
• Application Number:
  US11/880,939
• Publication Number:
  US 20090026533A1
• Time in Patent Office: Days
• US Class Current: 257/330
• CPC Class Codes: H01L 29/0878 Impurity concentration or distribution
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/456 on silicon
• CPC Class Codes: H01L 29/66727 with a step of recessing the source electrode
• CPC Class Codes: H01L 29/66734 with a step of recessing the gate electrode, e.g. to form a trench gate electrode
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A vertical semiconductor power device includes a plurality of semiconductor power cells having a drain disposed at a bottom of a semiconductor substrate. Each of the cells includes a gate surrounded by a body region encompassing a source region. The body region further includes multiple body-dopant implanted regions having a non-Gaussian distribution dopant profile for reducing a width of a transition region transitioning between the multiple body-dopant implanted regions and an epitaxial region underneath having a different conductivity type from the multiple body-dopant implanted regions.

Claims

1. A vertical semiconductor power device comprising a plurality of semiconductor power cells having a drain disposed at a bottom of a semiconductor substrate with each of said cells comprising a gate surrounded by a body region encompassing a source region wherein:

said body region further comprising multiple body-dopant implanted regions having a non-Gaussian distribution dopant profile for reducing a width of a transition region transitioning between said multiple body-dopant implanted regions and an epitaxial region underneath having a different conductivity type from said multiple body-dopant implanted regions.

2. The vertical semiconductor power device of claim 1 wherein:

said gate further comprising a polysilicon filling a trench opened in said semiconductor substrate.

3. The vertical semiconductor power device of claim 1 wherein:

said gate further comprising a polysilicon disposed on a top surface of said semiconductor substrate over a region surrounded by said multiple body-dopant implanted regions.

4. The vertical semiconductor power device of claim 1 wherein:

said multiple body-dopant implanted regions further comprising a deep body region implanted with body dopant ions having an implant energy of approximately 200 Kev to 600 Kev and a shallow body region implanted with body dopant ions having an implant energy approximately 10 KeV to 200 KeV.

5. The vertical semiconductor power device of claim 1 wherein:

said multiple body-dopant implanted regions further comprising a deep body region implanted with body dopant ions having an implant energy of approximately 300 Kev to 600 Kev, a medium body region implanted with body dopant ions having an implant energy approximately 100 KeV to 300 KeV and a shallow body region implanted with body dopant ions having an implant energy approximately 10 KeV to 100 KeV.

6. The vertical semiconductor power device of claim 1 wherein:

said vertical semiconductor power device further comprising a N-channel MOSFET device and said multiple body-dopant implanted regions comprising multiple P-body implanted regions.

7. The vertical semiconductor power device of claim 1 wherein:

said vertical semiconductor power device further comprising a P-channel MOSFET device and said multiple body-dopant implanted regions comprising multiple N-body implanted regions.

8. The vertical semiconductor power device of claim 1 wherein:

said vertical semiconductor power device further comprising a trench MOSFET device and said multiple body-dopant implanted regions surrounding a trench gate of said MOSFET device.

9. The vertical semiconductor power device of claim 8 further comprising:

a source/body contact trench opened through an insulation layer covering said trench MOSFET device extending into said epitaxial layer on semiconductor substrate for contacting said source regions and said multiple body implanted regions wherein said contact trench filled with a barrier metal and a tungsten plug electrically connecting to source metal composed of Ti and aluminum alloys disposed on top of said insulation layer.

10. The vertical semiconductor power device of claim 8 further comprising:

a gate contact trench opened through an insulation layer covering said trench MOSFET device extending into said trench gate and filled with a barrier metal and a tungsten plug and electrically connecting to a gate pad disposed on top of said insulation layer.

11. The vertical semiconductor power device of claim 1 wherein:

said vertical semiconductor power device further comprising a trenched MOSFET device wherein said trench is deeper than one micrometer (1.0 μ

m) and said trenched MOSFET device having an electrical characteristic of (Qgd/Qgs)<

1 where Qgd representing electric charges stored in a gate-drain capacitor and Qgs representing electric charges stored in a gate-source capacitor and said MOSFET device having a ON-resistance in a range of 1 mohm ˜

5 ohm.

12. A method for manufacturing a vertical semiconductor power device comprising a plurality of semiconductor power cells having a drain disposed at a bottom of a semiconductor substrate with each of said cells comprising a gate surrounded by a body region encompassing a source region comprising:

performing multiple body-dopant implantations to form multiple body-dopant implanted regions having a non-Gaussian distribution dopant profile for reducing a width of a transition region transitioning between said multiple body-dopant implanted regions and an epitaxial region underneath having a different conductivity type from said multiple body-dopant implanted regions.

13. The method of claim 12 wherein:

said step of performing multiple body-dopant implantations further comprising a step of implanting a deep body region with body dopant ions having an implant energy of approximately 200 Kev to 600 Kev and implanting a shallow body region with body dopant ions having an implant energy approximately 10 KeV to 200 KeV.

14. The method of claim 12 wherein:

said step of performing multiple body-dopant implantations further comprising a step of implanting a deep body region with body dopant ions having an implant energy of approximately 300 Kev to 600 Kev, implanting a medium body region with body dopant ions having an implant energy of 100 KeV to 300 KeV, and implanting a shallow body region with body dopant ions having an implant energy approximately 10 KeV to 100 KeV.

15. The method of claim 12 further comprising:

forming said vertical semiconductor power device as a trenched MOSFET device with a trench deeper than one micrometer (1.0 μ

m); and

forming said MOSFET device with an electrical characteristic of (Qgd/Qgs)<

1 where Qgd representing electric charges stored in a gate-drain capacitor and Qgs representing electric charges stored in a gate-source capacitor and forming said MOSFET device having a ON-resistance in a range of 1 mohm˜

5 ohm.

16. An electronic device comprising a vertical semiconductor power device that further includes a plurality of semiconductor power cells having a drain disposed at a bottom of a semiconductor substrate with each of said cells comprising a gate surrounded by a body region encompassing a source region wherein:

said body region further comprising multiple body-dopant implanted regions having a non-Gaussian distribution dopant profile for reducing a width of a transition region transitioning between said multiple body-dopant implanted regions and an epitaxial region underneath having a different conductivity type from said multiple body-dopant implanted regions.

17. The electronic device of claim 16 wherein:

said electronic device further comprising a DC-DC converter.

18. The electronic device of claim 16 wherein:

said multiple body-dopant implanted regions further comprising a deep body region implanted with body dopant ions having an implant energy of approximately 200 Kev to 600 Kev and a shallow body region implanted with body dopant ions having an implant energy approximately 10 KeV to 200 KeV.

19. The electronic device of claim 16 wherein:

said multiple body-dopant implanted regions further comprising a deep body region implanted with body dopant ions having an implant energy of approximately 300 Kev to 600 Kev, a medium body region implanted with body dopant ions having an implant energy approximately 100 KeV to 300 KeV and a shallow body region implanted with body dopant ions having an implant energy approximately 10 KeV to 100 KeV.

20. The electronic device of claim 16 wherein:

said vertical semiconductor power device further comprising a trenched MOSFET device wherein said trench is deeper than one micrometer (1.0 μ

m) and said trenched MOSFET device having an electrical characteristic of (Qgd/Qgs)<

1 where Qgd representing electric charges stored in a gate-drain capacitor and Qgs representing electric charges stored in a gate-source capacitor and said MOSFET device having a ON-resistance in a range of 1 mohm˜

5 ohm.