SOLID-STATE IMAGING DEVICE

• US 20090026571A1
• Filed: 04/15/2008
• Published: 01/29/2009
• Est. Priority Date: 07/27/2007
• Status: Active Grant

• Current Assignee: Collabo Innovations, Inc. (Wi-LAN Inc.)
• Original Assignee: Panasonic Corporation (Panasonic Holdings Corporation)
• Inventors: Inagaki, Makoto, Kyougoku, Masanori
• Granted Patent: US 7,671,438 B2
• Time in Patent Office: Days
• US Class Current: 257/467
• CPC Class Codes: H01L 27/14603 Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
• CPC Class Codes: H01L 27/14609 Pixel-elements with integrated switching, control, storage or amplification elements scanning details of imagers (circuitry of solid-state image sensors H04N25/00); circuitry of imagers H04N25/70
• CPC Class Codes: H01L 27/14623 Optical shielding
• CPC Class Codes: H01L 27/14689 MOS based technologies

Abstract

A solid-state imaging device includes first pixels and second pixels. Each of the first pixels and the second pixels includes a p-type diffusion layer formed in a semiconductor substrate and an n-type diffusion layer formed on the p-type diffusion layer. A first p-type implantation layer is formed on a surface side of the semiconductor substrate on the n-type diffusion layer of the first pixels. A second p-type implantation layer having a lower impurity concentration than the first p-type implantation layer or no p-type implantation layer is formed on a surface side of the semiconductor substrate on the n-type diffusion layer of the second pixels.

Claims

1. A solid-state imaging device, comprising:

a plurality of first pixels and a plurality of second pixels which are formed in a semiconductor substrate, wherein

each of the first pixels includes a first impurity region of a first conductivity type formed in the semiconductor substrate, a second impurity region of a second conductivity type formed on the first impurity region and serving as a first photodiode, and a fifth impurity region of a first conductivity type formed on a surface side of the semiconductor substrate on the second impurity region, and

each of the second pixels includes a third impurity region of a first conductivity type formed in the semiconductor substrate, a fourth impurity region of a second conductivity type formed on the third impurity region and serving as a second photodiode, and an impurity region of a first conductivity type having a same impurity concentration as the first impurity region and formed on a surface side of the semiconductor substrate on the fourth impurity region or a sixth impurity region of a first conductivity type having a lower impurity concentration than the fifth impurity region and formed on a surface side of the semiconductor substrate on the fourth impurity region.

2. The solid-state imaging device according to claim 1, wherein the second pixels are temperature detection pixels.

3. The solid-state imaging device according to claim 1, wherein the plurality of second pixels are covered with a light shielding layer for blocking incident light.

4. The solid-state imaging device according to claim 1, further comprising:

an imaging region having the plurality of first pixels arranged therein two-dimensionally; and

a light receiving region provided around the imaging region and having the plurality of second pixels arranged therein.

5. The solid-state imaging device according to claim 4, further comprising a light shielding region formed between the imaging region and the light receiving region, having a plurality of optical black pixels having a same structure as the first pixels arranged therein, and covered with a light shielding layer.

6. The solid-state imaging device according to claim 1, wherein the plurality of first pixels include a first reading portion for reading a signal generated in the first photodiode according to incident light, and the plurality of second pixels include a second reading portion for reading a temperature detection signal generated in the second photodiode.

7. The solid-state imaging device according to claim 6, further comprising a signal processing circuit including a temperature table storage portion having temperature information prestored therein and a temperature calculation portion for calculating a temperature of the plurality of second pixels by comparing an output signal of each of the plurality of second pixels with the temperature information stored in the temperature table storage portion.

8. The solid-state imaging device according to claim 7, wherein the signal processing circuit further includes an image correction portion for processing an output signal that is output as an image signal from each of the plurality of first pixels, based on the temperature calculated in the temperature calculation portion, to correct the image signal.

9. The solid-state imaging device according to claim 8, wherein the temperature calculation portion calculates the temperature of the second pixels by using an average value of output signals of at least two of the plurality of second pixels.

10. The solid-state imaging device according to claim 7, wherein a storage time of the signal generated in the second photodiode, that is, a time until the signal generated in the second photodiode is read by the second reading portion, is longer than a storage time of the signal generated in the first photodiode, that is, a time until the signal generated in the first photodiode is read by the first reading portion.

11. The solid-state imaging device according to claim 7, further comprising a power supply control circuit for controlling supply of a power supply voltage according to the temperature of the second pixels calculated by the second photodiode.

12. The solid-state imaging device according to claim 11, wherein the power supply control circuit stops supply of the power supply voltage according to the temperature of the second pixels.

13. The solid-state imaging device according to claim 11, wherein the power supply control circuit reduces the power supply voltage according to the temperature of the second pixels.