Display device and driving method using multiple pixel control units

• US 20090027363A1
• Filed: 01/28/2008
• Published: 01/29/2009
• Est. Priority Date: 07/27/2007
• Status: Active Grant

• Current Assignee: Omnivision Technologies Incorporated (Will Semiconductor Co., Ltd. Shanghai)
• Original Assignee: Omnivision Technologies Incorporated (Will Semiconductor Co., Ltd. Shanghai)
• Inventors: Ng, Sunny Yat-san, Kwan, Kin Yip Kenneth, Zuravleff, William K., Nguyen, Andrea
• Granted Patent: US 8,228,356 B2
• Time in Patent Office: Days
• US Class Current: 345/204
• CPC Class Codes: G09G 2310/0235 Field-sequential colour display
• CPC Class Codes: G09G 2310/0267 Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
• CPC Class Codes: G09G 2310/0272 Details of drivers for data electrodes, the drivers communicating data to the pixels by means of a current
• CPC Class Codes: G09G 3/20 for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
• CPC Class Codes: G09G 3/2022 using sub-frames
• CPC Class Codes: G09G 5/395 Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen G09G5/399 takes precedence

Abstract

A novel method for driving a display having an array of pixels arranged in a plurality of columns and a plurality of rows includes the steps of defining a modulation period for a row of pixels, dividing the modulation period into a number of coequal time intervals equal to n times the number of rows in the array, receiving a multi-bit data word that indicates an intensity value, and updating the signal asserted on the pixel during a plurality of the time intervals such that the intensity value is displayed by the pixel. Note that n is an integer greater than zero. The method can be applied to all rows, which can be driven asynchronously. A display driver for performing the novel methods is also disclosed. The present invention facilitates driving the display at 100% bandwidth efficiency during each time interval in the modulation period.

Claims

1. A method for driving a display device including an array of pixels arranged in a plurality of columns and a plurality of rows, said method comprising:

defining a plurality of modulation periods during which electrical signals corresponding to particular intensity values will be asserted on said pixels in said rows of said array;

dividing each of said plurality of modulation periods into a plurality of time intervals;

associating each of said rows in said array with one of a plurality of sets of said rows;

receiving a plurality of multi-bit data words each indicative of an intensity value to be displayed by a corresponding one of said pixels in said array; and

updating the electrical signals asserted on said pixels in a plurality of said rows during each of said time intervals with a plurality of pixel control units; and

wherein each of said plurality of pixel control units updates only the rows associated with a particular one of said sets of said rows during each of said time intervals.

2. A method according to claim 1, wherein:

the number of bits in each of said multi-bit data words is evenly divisible by an integer (s); and

(s) is equal to the number of said sets of said rows.

3. A method according to claim 2, further comprising:

dividing each of said modulation periods into a number of said time intervals equal to (n) times the number of said rows in said array, (n) being an integer greater than zero; and

wherein the number of bits in each of said multi-bit data words is evenly divisible by the product of (s) and (n).

4. A method according to claim 1, wherein:

the sum of the weighted values of the bits in each of said multi-bit data words is evenly divisible by an integer (s); and

(s) is equal to the number of said sets of said rows.

5. A method according to claim 4, further comprising:

dividing each of said modulation periods into a number of said time intervals equal to (n) times the number of said rows in said array, (n) being an integer greater than zero; and

wherein the sum of the weighted values of the bits in each of said multi-bit data words is evenly divisible by the product of (s) and (n).

6. A method according to claim 1, wherein each pixel control unit updates the same number of said rows in said array as every other said pixel control unit during each of said time intervals.

7. A method according to claim 6, wherein:

the number of bits in each of said multi-bit data words is evenly divisible by an integer (s);

the sum of the weighted values of the bits in each of said multi-bit data words is evenly divisible by an integer (s); and

(s) is equal to the number of said sets of said rows.

8. A method according to claim 7, further comprising:

dividing each of said modulation periods into a number of time intervals equal to the number of said rows in said array divided by (m), (m) being a common divisor of the number of said rows in said array; and

(m) is a common divisor of the number of said rows in said array.

9. A method according to claim 6, further comprising:

dividing each of said modulation periods into a number of said time intervals equal to (n) times the number of said rows in said array, (n) being an integer greater than zero; and

wherein

the number of bits in each of said multi-bit data words is evenly divisible by the product of (s) and (n); and

the sum of the weighted values of the bits in each of said multi-bit data words is evenly divisible by the product of (s) and (n).

10. A method according to claim 1, further comprising:

updating even-numbered ones of said rows with a first pixel control unit; and

updating odd-numbered ones of said rows with a second pixel control unit.

11. A method according to claim 10, wherein said first pixel control unit updates the same number of said rows in said array as said second pixel control unit during each of said time intervals.

12. A method according to claim 11, wherein:

the number of bits in each of said multi-bit data words is evenly divisible by two; and

the sum of the weighted values of the bits in each of said multi-bit data words is evenly divisible by two.

13. A method according to claim 11, further comprising:

dividing each of said modulation periods into a number of said time intervals equal to (n) times the number of said rows in said array, (n) being an integer greater than zero; and

wherein

the number of bits in each of said multi-bit data words is evenly divisible by 2n; and

the sum of the weighted values of the bits in each of said multi-bit data words is evenly divisible by 2n.

14. A method according to claim 1, further comprising:

receiving a binary-weighted data word; and

converting said binary-weighted data word into one of said multi-bit data words, said one of said multi-bit data words having at least one binary-coded bit and at least one thermometer-coded bit.

15. A method according to claim 1, further comprising:

receiving a first frame synchronization signal at the beginning of a particular one of said modulation periods;

receiving a second frame synchronization signal that defines a time difference between the end of the last one of said time intervals of said particular modulation period and receipt of said second frame synchronization signal;

defining a subsequent modulation period;

dividing said subsequent modulation period into said plurality of time intervals; and

adjusting the duration of at least some of said time intervals of said subsequent modulation period to spread said time difference over said subsequent modulation period.

16. A method according to claim 1, further comprising:

receiving a frame synchronization signal at the beginning of a particular one of said modulation periods;

receiving a first-of-frame signal indicating the beginning of a first one of said time intervals in said particular modulation period;

measuring the phase difference between said frame synchronization signal and said first-of-frame signal; and

adjusting the duration of at least some of said time intervals in said particular modulation period based on said phase difference in order to synchronize receipt of a subsequent frame synchronization signal and a subsequent first-of-frame signal.

17. A method according to claim 1, wherein each pixel in said array includes a liquid crystal layer disposed between a pixel electrode and a common electrode, said method further comprising:

asserting said signal on said pixel relative to said common electrode in a first bias direction during a first group of said time intervals; and

asserting said signal on said pixel in a second bias direction during a second group of said time intervals.

18. A method according to claim 1, further comprising:

discarding at least one bit of one of said multi-bit data words prior to the end of said modulation period associated with said corresponding pixel; and

wherein said step of updating said signal asserted on said corresponding pixel includes updating said signal based on any remaining bits of said one of said multi-bit data words.

19. A method according to claim 1, further comprising temporally offsetting at least one of said modulation periods from at least some of the other said modulation periods.

20. An electronically readable medium having code embodied thereon for causing an electronic device to perform the method of claim 1.

21. A display driver for driving an array of pixels arranged in a plurality of columns and a plurality of rows, said display driver comprising:

a timer operative to generate a series of time values each associated with a respective one of a plurality of time intervals;

a data input terminal set for receiving a plurality of multi-bit data words, each of said multi-bit data words indicative of an intensity value to be asserted on a corresponding ones of said pixels; and

control logic including a plurality of pixel control units, each of said pixel control units operative to update the electrical signals asserted on said pixels, said control logic operative to

define a plurality of modulation periods during which electrical signals corresponding to said intensity values will be asserted on said pixels in said rows of said array, each of said modulation periods including a plurality of said time intervals,

associate each row in said array with one of a plurality of sets of rows, and

cause at least some of said pixel control units to update the electrical signals asserted on said pixels in at least one of said rows during each of said time intervals, each of said pixel control units updating only said rows associated with one of said sets of rows.

22. A display driver according to claim 21, wherein:

the number of bits in each of said multi-bit data words is evenly divisible by an integer (s); and

(s) is equal to the number of said sets of said rows.

23. A display driver according to claim 22, wherein:

said control logic is further operative to divide each of said modulation periods into a number of said time intervals equal to (n) times the number of said rows in said array, (n) being an integer greater than zero;

the number of bits in each of said multi-bit data words is evenly divisible by the product of (s) and (n).

24. A display driver according to claim 21, wherein:

the sum of the weighted values of the bits in each of said multi-bit data words is evenly divisible by an integer (s); and

(s) is equal to the number of said sets of said rows.

25. A display driver according to claim 24, wherein:

said control logic is further operative to divide each of said modulation periods into a number of said time intervals equal to (n) times the number of said rows in said array;

the sum of the weighted values of the bits in each of said multi-bit data words is evenly divisible by the product of (s) and (n); and

(n) is an integer greater than zero.

26. A display driver according to claim 21, wherein each pixel control unit updates the same number of said rows in said array as every other said pixel control unit during each of said time intervals.

27. A display driver according to claim 26, wherein:

the number of bits in each of said multi-bit data words is evenly divisible by an integer (s);

the sum of the weighted values of the bits in each of said multi-bit data words is evenly divisible by (s); and

(s) is equal to the number of said sets of said rows.

28. A display driver according to claim 27, wherein:

said control logic is further operative to divide each of said modulation periods into a number of time intervals equal to the number of said rows in said array divided by (m); and

(m) is a common divisor of the number of said rows in said array.

29. A display driver according to claim 26, wherein:

said control logic is further operative to divide each of said modulation periods into a number of said time intervals equal to (n) times the number of said rows in said array, (n) being an integer greater than zero;

the number of bits in each of said multi-bit data words is evenly divisible by the product of(s) and (n);

the sum of the weighted values of the bits in each of said multi-bit data words is evenly divisible by the product of(s) and (n); and

(s) is equal to the number of said sets of said rows.

30. A display driver according to claim 21, wherein:

said control logic contains a first pixel control unit and a second pixel control unit;

said first pixel control unit is operative to update the electrical signals asserted on said pixels in even-numbered ones of said rows; and

said second pixel control unit is operative to update the electrical signals asserted on said pixels in odd-numbered ones of said rows.

31. A display driver according to claim 30, wherein said first pixel control unit updates the same number of said rows in said array as said second pixel control unit during each of said time intervals.

32. A display driver according to claim 31, wherein:

the number of bits in each of said multi-bit data words is evenly divisible by two; and

the sum of the weighted values of the bits in each of said multi-bit data words is evenly divisible by two.

33. A display driver according to claim 31, wherein:

said control logic is further operative to divide each of said modulation periods into a number of said time intervals equal to (n) times the number of said rows in said array, (n) being an integer greater than zero;

the number of bits in each of said multi-bit data words is evenly divisible by 2n; and

the sum of the weighted values of the bits in each of said multi-bit data words is evenly divisible by 2n.

34. A display driver according to claim 21, wherein:

said data input terminal set is further operative to receive a binary-weighted data word; and

said control logic is further operative to convert said binary-weighted data word into one of said plurality of multi-bit data words, said one of said multi-bit data words having at least one binary-coded bit and at least one thermometer-coded bit.

35. A display driver according to claim 21, further comprising:

a synchronization input operative to receive a series of frame synchronization signals; and

a compensator operative adjust the duration of subsequent ones of said time intervals to spread the time difference between the end of the last one of said time intervals in one of said modulation periods and a next frame synchronization signal over a subsequent modulation period.

36. A display driver according to claim 21, further comprising:

a synchronization input operative to receive a series of frame synchronization signals; and

a compensator operative to

measure a phase difference between the receipt of a frame synchronization signal and a first-of-frame signal indicative of the beginning of a first one of said time intervals in one of said modulation periods, and

adjust the duration of at least some of said time intervals in said one of said modulation periods based on said phase difference in order to synchronize receipt of a subsequent frame synchronization signal and a subsequent first-of-frame signal.

37. A display driver according to claim 21, wherein:

each pixel in said array includes a liquid crystal layer disposed between a pixel electrode and a common electrode; and

said display driver further includes a debias controller operative to

provide a first debias signal indicative of a first bias direction for a first group of said time intervals, and

provide a second debias signal indicative of a second bias direction for a second group of said time intervals.

38. A display driver according to claim 21, wherein said control logic is further operative to:

discard at least one bit of one of said multi-bit data words prior to the end of said modulation period associated with said corresponding pixel; and

update said signal on said corresponding pixel based on any remaining bits of said multi-bit data word such that said corresponding pixel displays said intensity value.

39. A display driver according to claim 21, wherein said control logic is further operative to temporally offset at least one of said plurality of modulation periods from at least some of the other ones of said plurality of said modulation periods.

40. A display driver for driving an array of pixels arranged in a plurality of columns and a plurality of rows, said display driver comprising:

a timer operative to generate a series of time values each associated with a respective one of a plurality of time intervals;

a data input terminal set for receiving a plurality of multi-bit data words, each of said multi-bit data words indicative of an intensity value to be asserted on a corresponding ones of said pixels; and

means for updating electrical signals asserted on said pixels in separate sets of said rows such that each of said intensity values is asserted on said corresponding pixel.