Small Area, Robust Silicon Via Structure and Process
First Claim
14. A method for etching a plurality of deep vias on a substrate, the method comprising:
- prefabricating a thermal oxide collar using an etching process for creating one or more etches on a silicon substrate;
adding one or more circuits to the substrate through the etches;
creating conductive vias in the substrate by deepening the etches;
depositing a liner contact on the substrate;
applying a chemical-mechanical planarization as touchup and removing the liner contact;
building a back end of line layer;
grinding the liner; and
depositing an insulator.
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Accused Products
Abstract
A semiconductor structure includes: at least one silicon surface wherein the surface can be a substrate, wafer or other device. The structure further includes at least one electronic circuit formed on each side of the at least one surface; and at least one conductive high aspect ratio through silicon via running through the at least one surface. Each through silicon via is fabricated from at least one etch step and includes: at least one thermal oxide dielectric for coating at least some of a sidewall of the through silicon via for a later etch stop in fabrication of the through silicon via.
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Citations
35 Claims
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14. A method for etching a plurality of deep vias on a substrate, the method comprising:
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prefabricating a thermal oxide collar using an etching process for creating one or more etches on a silicon substrate; adding one or more circuits to the substrate through the etches; creating conductive vias in the substrate by deepening the etches; depositing a liner contact on the substrate; applying a chemical-mechanical planarization as touchup and removing the liner contact; building a back end of line layer; grinding the liner; and depositing an insulator. - View Dependent Claims (1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26)
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21-1. The method of claim 15, wherein the etches are annular.
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27. A method for etching deep vias on a substrate, the method comprising:
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prefabricating a thermal oxide collar using an etching process for creating the deep vias on a silicon substrate, wherein etch stops are created; adding metallization structures as conductors; performing wafer thinning; removing any surface oxide and silicon using the etch stops as barriers; depositing a liner/barrier; plating the conductors; and forming an interconnection pad. - View Dependent Claims (28, 29, 30, 31, 32, 33, 34, 35)
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Specification