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Command Queuing Smart Storage Transfer Manager for Striping Data to Raw-NAND Flash Modules

  • US 20090037652A1
  • Filed: 10/15/2008
  • Published: 02/05/2009
  • Est. Priority Date: 12/02/2003
  • Status: Active Grant
First Claim
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1. A multi-level flash device comprising:

  • a smart storage switch which comprises;

    an upstream interface to a host for receiving host commands to access non-volatile memory (NVM) and for receiving host data and a host address;

    a smart storage transaction manager that manages transactions from the host;

    a virtual storage processor that maps the host address to an assigned flash module to generate a logical block address (LBA), the virtual storage processor performing a first level of mapping;

    a virtual storage bridge between the smart storage transaction manager and a LBA bus;

    a NVM controller, coupled to the LBA bus to receive the LBA generated by the virtual storage processor and the host data from the virtual storage bridge;

    a second-level mapper, in the NVM controller, that maps the LBA to a physical block address (PBA);

    a plurality of flash modules that include the assigned flash module, wherein a flash module comprises;

    raw-NAND flash memory chips, coupled to the NVM controller, for storing the host data at a block location identified by the PBA generated by the second-level mapper in the NVM controller;

    whereby address mapping is performed at two levels to access the raw-NAND flash memory chips.

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