ADAPTIVE INTEGRATED CIRCUITRY WITH HETEROGENEOUS AND RECONFIGURABLE MATRICES OF DIVERSE AND ADAPTIVE COMPUTATIONAL UNITS HAVING FIXED, APPLICATION SPECIFIC COMPUTATIONAL ELEMENTS

• US 20090037693A1
• Filed: 10/15/2008
• Published: 02/05/2009
• Est. Priority Date: 03/22/2001
• Status: Active Grant

• Current Assignee: Altera Corporation (Intel Corporation)
• Original Assignee: QuickSilver Controls, Inc.
• Inventors: Scheuermann, Walter James, Master, Paul L., Hogenauer, Eugene
• Granted Patent: US 8,356,161 B2
• Time in Patent Office: Days
• US Class Current: 712/15
• CPC Class Codes: G06F 13/4027 using bus bridges G06F13/4022 takes precedence
• CPC Class Codes: G06F 15/7867 with reconfigurable architecture
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

The present invention concerns a new category of integrated circuitry and a new methodology for adaptive or reconfigurable computing. The preferred IC embodiment includes a plurality of heterogeneous computational elements coupled to an interconnection network. The plurality of heterogeneous computational elements include corresponding computational elements having fixed and differing architectures, such as fixed architectures for different functions such as memory, addition, multiplication, complex multiplication, subtraction, configuration, reconfiguration, control, input, output, and field programmability. In response to configuration information, the interconnection network is operative in real-time to configure and reconfigure the plurality of heterogeneous computational elements for a plurality of different functional modes, including linear algorithmic operations, non-linear algorithmic operations, finite state machine operations, memory operations, and bit-level manipulations. The various fixed architectures are selected to comparatively minimize power consumption and increase performance of the adaptive computing integrated circuit, particularly suitable for mobile, hand-held or other battery-powered computing applications.

Claims

1-74. -74. (canceled)

75. A method of configuring an adaptive computing engine to perform multiple functions, comprising:

coupling a first interconnection network to a plurality of heterogeneous computational units, the plurality of heterogeneous computational units being part of a computing matrix coupled to a second interconnection network, and wherein each of the heterogeneous computational units include a plurality of computational elements interconnected with each other, the heterogeneous computational units including at least two computational units with different computing architectures;

sending configuration information to the computational units to perform a first function;

configuring the computational units to perform the first function;

sending different configuration information to the computational units to perform a second function; and

reconfiguring the computational units to perform the second function.

76. The method of claim 75, further comprising providing a data flow graph associated with the first function, the data flow graph incorporating the configuration information.

77. The method of claim 76, wherein the first interconnection network connects the computational units in accordance with the data flow graph.

78. The method of claim 75, wherein the second interconnection network provides switchable connections between the computing matrix and the other components.

79. The method of claim 75, wherein the computational units further each include a plurality of computational elements interconnected with each other.

80. The method of claim 75, wherein at least one of the plurality of computational elements have a first computational architecture with a first computational function and a second one of the plurality of computational elements have a second different computational architecture with a second computational function different from the first computational function.

81. The method of claim 75, wherein the first interconnection network has denser interconnections than the interconnections of the second interconnection network.

82. The method of claim 75 further comprising:

operating the first and second interconnection networks as a Boolean interconnection network and a data interconnection network; and

transmitting data and configuration information via the first and second interconnection networks.

83. The method of claim 75, further comprising transmitting configuration information via the second interconnection network to the computing matrix to configure and reconfigure the computing matrix.

84. The method of claim 75, further comprising transmitting data via the second interconnection network to the computing matrix.

85. A method of configuring an adaptive computing engine to perform multiple functions, comprising:

coupling a first interconnection network to a plurality of computational elements, the plurality of computational elements being part of a first computational unit coupled to a second computational unit via a second interconnection network, the second computational unit having a plurality of different computational elements from the plurality of computational elements of the first computational unit;

sending configuration information to the first computational unit to perform a first function;

configuring the interconnections between at least some of the computational elements of the first computational unit to perform the first function;

sending different configuration information to the computational units to perform a second function; and

reconfiguring at least some of interconnections between at least some of the computational elements of the computational units to perform the second function.

86. The method of claim 85, further comprising providing a data flow graph associated with the first function, the data flow graph incorporating the configuration information.

87. The method of claim 86, wherein the first interconnection network connects the computational elements in accordance with the data flow graph.

88. The method of claim 85, wherein the plurality of computational units are organized in a computing matrix, and the computing matrix is coupled to a third interconnection network.

89. The adaptive computing engine of claim 85, wherein the plurality of computational elements each have a heterogeneous computational architecture.

90. The adaptive computing engine of claim 88, wherein the third interconnection network allows communication between computational elements, the first interconnection network having denser interconnections than the interconnections of the third interconnection network.

91. The adaptive computing engine of claim 85, further comprising sending data to the computational units via the second interconnection network and wherein the configuration information is sent via the second interconnection network.