SYSTEM AND METHOD OF LOAD-STORE FORWARDING
First Claim
1. A method comprising:
- storing information of uncommitted load instructions in a first plurality of entries;
storing information of uncommitted store instructions in a second plurality of entries;
conveying first information of a first load instruction to each entry of the second plurality of entries;
storing a set retry bit and a store index corresponding to a chosen store instruction in a first entry of the first plurality of entries corresponding to the first load instruction; and
conveying bypass data from an entry of the second plurality of entries selected by the store index to the first load instruction.
1 Assignment
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Accused Products
Abstract
A system and method for data forwarding from a store instruction to a load instruction during out-of-order execution, when the load instruction address matches against multiple older uncommitted store addresses or if the forwarding fails during the first pass due to any other reason. In a first pass, the youngest store instruction in program order of all store instructions older than a load instruction is found and an indication to the store buffer entry holding information of the youngest store instruction is recorded. In a second pass, the recorded indication is used to index the store buffer and the store bypass data is forwarded to the load instruction. Simultaneously, it is verified if no new store, younger than the previously identified store and older than the load has not been issued due to out-of-order execution.
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Citations
20 Claims
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1. A method comprising:
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storing information of uncommitted load instructions in a first plurality of entries; storing information of uncommitted store instructions in a second plurality of entries; conveying first information of a first load instruction to each entry of the second plurality of entries; storing a set retry bit and a store index corresponding to a chosen store instruction in a first entry of the first plurality of entries corresponding to the first load instruction; and conveying bypass data from an entry of the second plurality of entries selected by the store index to the first load instruction. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A computer system comprising:
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a processor comprising a load-store unit; and a memory coupled to the processor; wherein the processor is configured to issue load and store operations to the load-store unit; wherein the load-store unit is configured to; store information of uncommitted load instructions in a first plurality of entries; store information of uncommitted store instructions in a second plurality of entries; convey first information of a first load instruction to each entry of the second plurality of entries; store a set retry bit and a store index, corresponding to a chosen store instruction, in a first entry of the first plurality of entries corresponding to the first load instruction; and convey bypass data from an entry of the second plurality of entries selected by the store index to the first load instruction. - View Dependent Claims (8, 9, 10, 11, 12)
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13. A load-store unit comprising:
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a load buffer comprising a first plurality of entries, wherein an entry stores information of an uncommitted load instruction; a store buffer comprising a second plurality of entries, wherein an entry stores information of an uncommitted store instruction; and a priority encoder; wherein the load buffer is configured to convey first information of a first load instruction to each entry of the store buffer; wherein the load buffer is configured to store a set retry bit and a store index, corresponding to a chosen store instruction, in a first entry corresponding to the first load instruction, wherein the set retry bit and the store index are conveyed by the priority encoder; and wherein the store buffer is configured to convey bypass data selected by the store index to the first load instruction. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20)
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Specification