METHODS FOR GENERATING A STANDARD REFERENCE DIE FOR USE IN A DIE TO STANDARD REFERENCE DIE INSPECTION AND METHODS FOR INSPECTING A WAFER

• US 20090041332A1
• Filed: 07/18/2008
• Published: 02/12/2009
• Est. Priority Date: 07/20/2007
• Status: Active Grant

• Current Assignee: KLA-Tencor Corporation (KLA Corporation)
• Original Assignee: KLA-Tencor Corporation (KLA Corporation)
• Inventors: Wallingford, Richard, Maayah, Kais, Bhaskar, Kris, McCord, Mark, Bhattacharyya, Santosh, Liang, Ardis, Altendorfer, Hubert
• Granted Patent: US 7,796,804 B2
• Time in Patent Office: Days
• US Class Current: 382/145
• CPC Class Codes: G01N 21/93 Detection standards; Calibrating baseline adjustment, drift correction
• CPC Class Codes: G01N 21/95607 using a comparative method
• CPC Class Codes: G03F 1/84 Inspecting
• CPC Class Codes: G03F 7/7065 Defects, e.g. optical inspection of patterned layer for defects
• CPC Class Codes: G06T 2207/30148 Semiconductor; IC; Wafer
• CPC Class Codes: G06T 7/001 using an image reference approach

Abstract

Methods for generating a standard reference die for use in a die to standard reference die inspection and methods for inspecting a wafer are provided. One computer-implemented method for generating a standard reference die for use in a die to standard reference die inspection includes acquiring output of an inspection system for a centrally located die on a wafer and one or more dies located on the wafer. The method also includes combining the output for the centrally located die and the one or more dies based on within die positions of the output. In addition, the method includes generating the standard reference die based on results of the combining step.

Claims

1. A computer-implemented method for generating a standard reference die for use in a die to standard reference die inspection, comprising:

acquiring output of an inspection system for a centrally located die on a wafer and one or more dies located on the wafer;

combining the output for the centrally located die and the one or more dies based on within die positions of the output; and

generating the standard reference die based on results of said combining.

2. The method of claim 1, wherein the standard reference die comprises an image.

3. The method of claim 1, wherein the die to standard reference die inspection comprises inspection for repeater defects.

4. The method of claim 1, wherein the standard reference die comprises substantially no noise from random defects in the centrally located die and the one or more dies.

5. The method of claim 1, further comprising aligning the standard reference die to design data space, wherein said generating comprises generating the standard reference die for only positions in the design data space corresponding to predetermined areas in the design data space.

6. The method of claim 1, wherein the output comprises gray levels, and wherein said combining comprises determining a mean value of the gray levels across the within die positions.

7. The method of claim 1 wherein the output comprises gray levels, and wherein said combining comprises determining a median value of the gray levels across the within die positions.

8. The method of claim 1, wherein the output comprises gray levels, wherein said combining comprises determining a mean value and a median value of the gray levels across the within die positions, wherein the standard reference die comprises the mean value across the within die positions, and wherein the method comprises generating an additional standard reference die of the median value across the within die positions.

9. The method of claim 1, wherein said combining comprises determining a characteristic of the output across the within die positions and noise in the characteristic across the within die positions.

10. A method for inspecting a wafer, comprising:

acquiring output of an inspection system for the wafer;

combining the output for a centrally located die on the wafer and one or more dies located on the wafer based on within die positions of the output;

generating a standard reference die based on results of said combining; and

comparing the standard reference die to the output for one or more test dies on the wafer to detect defects in the one or more test dies.

11. The method of claim 10, wherein the standard reference die and the output for the one or more test dies comprise images.

12. The method of claim 10, wherein all steps of the method are performed during run time of inspection of the wafer.

13. The method of claim 10, wherein the defects comprise repeater defects.

14. The method of claim 10, wherein the defects comprise systematic defects caused by manufacturing of a reticle used to fabricate the wafer.

15. The method of claim 10, wherein the defects comprise systematic defects, and wherein the one or more test dies are formed on the wafer using a process window qualification methodology.

16. The method of claim 10, wherein the standard reference die comprises substantially no noise from random defects in the centrally located die and the one or more dies.

17. The method of claim 10, further comprising combining the output for two or more of the one or more test dies such that the combined output for the two or more test dies comprises less noise from random defects than the output for each of the one or more test dies.

18. The method of claim 10, further comprising combining the output for two or more of the one or more test dies, wherein said comparing comprises comparing the standard reference die to the combined output for the two or more test dies to detect the defects in the two or more test dies, and wherein the defects comprise repeater defects.

19. The method of claim 10, wherein the comparing step is performed using adaptive thresholding.

20. The method of claim 10, wherein said comparing comprises aligning the standard reference die and the output for the one or more test dies using equalization of histograms for the standard reference die and the one or more test dies.

21. The method of claim 10, wherein said comparing comprises template matching of a neighborhood of pixels in the standard reference die and a neighborhood of pixels in the output for the one or more test dies.

22. The method of claim 10, wherein said acquiring comprises acquiring the output for only a portion of the test dies on the wafer.

23. The method of claim 10, further comprising aligning the standard reference die to design data space, wherein said generating comprises generating the standard reference die for only positions in the design data space corresponding to predetermined areas in the design data space.

24. A method for inspecting a wafer, comprising:

acquiring output of an inspection system for a standard reference wafer;

combining the output for a centrally located die on the standard reference wafer and one or more dies located on the standard reference wafer based on within die positions of the output;

generating a standard reference die based on results of said combining;

acquiring output of the inspection system for the wafer; and

comparing the standard reference die to output for one or more test dies on the wafer to detect defects in the one or more test dies.

25. The method of claim 24, further comprising determining a position of the standard reference die and a position of the output for the one or more test dies with respect to design data space prior to said comparing and aligning the standard reference die and the output for the one or more test dies based on the positions of the standard reference die and the output for the one or more test dies with respect to the design data space prior to said comparing.

26. The method of claim 24, further comprising aligning the standard reference die to the output for the one or more test dies prior to said comparing using a frame by frame alignment technique.

27. The method of claim 24, further comprising aligning a first swath of the output for the one or more test dies with respect to a global alignment and aligning a second swath of the output for the one or more test dies to the first swath to thereby align the second swath to the global alignment.

28. The method of claim 24, wherein the output of the inspection system for the wafer comprises at least two samples per illumination spot on the wafer.

29. The method of claim 24, wherein said acquiring the output of the inspection system for the wafer comprises acquiring the output for only a portion of the test dies on the wafer.

30. The method of claim 24, wherein said acquiring the output for the standard reference wafer and the wafer is performed using broadband deep ultraviolet mode inspection.

31. The method of claim 24, wherein said acquiring the output for the standard reference wafer and the wafer is performed using broadband edge contrast mode inspection.

32. A computer-implemented method for detecting defects on a wafer, comprising:

combining multiple images of a structure formed on the wafer to generate a composite image of the structure, wherein the multiple images are acquired at multiple positions on the wafer at which the structure is formed; and

comparing the composite image to a reference to detect defects on the wafer.

33. The method of claim 32, wherein the defects comprise systematic defects.

34. The method of claim 32, wherein the defects have a size that is approximately equal to line edge roughness of the structure.

35. The method of claim 32, wherein said combining comprises averaging the multiple images.

36. The method of claim 32, wherein the multiple positions comprise positions of the structure in cells having identical designs.

37. The method of claim 32, wherein the multiple positions comprise positions of the structure in neighboring dies.

38. The method of claim 32, wherein said combining is performed such that the composite image has less line edge roughness than each of the multiple images.

39. The method of claim 32, wherein said combining is performed such that the composite image has less random variation than each of the multiple images.

40. The method of claim 32, wherein said combining is performed such that the composite image has less gray level noise than each of the multiple images.

41. The method of claim 32, wherein the reference comprises a known good image of the structure.

42. The method of claim 32, wherein the reference comprises an image of the structure acquired in a standard reference die.

43. The method of claim 32, wherein the reference comprises a reference image, a composite test image, or a reference image and a composite test image of the structure acquired in a process window qualification die.

44. The method of claim 32, wherein the reference comprises a rendered database image.

45. The method of claim 32, wherein the reference comprises a composite image of the structure generated from multiple images acquired at multiple positions on the wafer or on a different wafer.