Fabrication method of an organic substrate having embedded active-chips

• US 20090042336A1
• Filed: 01/30/2008
• Published: 02/12/2009
• Est. Priority Date: 08/06/2007
• Status: Abandoned Application

• Current Assignee: Korea Advanced Institute of Science and Technology
• Original Assignee: Korea Advanced Institute of Science and Technology
• Inventors: Son, Ho-Young, Paik, Kyung-Wook
• Application Number:
  US12/010,894
• Publication Number:
  US 20090042336A1
• Time in Patent Office: Days
• US Class Current: 438/107
• CPC Class Codes: H01L 21/4857 Multilayer substrates multilayer metallisation on monolayer substrate H01L21/4846
• CPC Class Codes: H01L 2224/1134 Stud bumping, i.e. using a wire-bonding apparatus
• CPC Class Codes: H01L 2224/13144 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/2919 with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73204 the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 2224/73253 Bump and layer connectors
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/83192 wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/838 Bonding techniques
• CPC Class Codes: H01L 23/49822 Multilayer substrates multilayer metallisation on monolayer substrate H01L23/498
• CPC Class Codes: H01L 23/5389 the chips being integrally enclosed by the interconnect and support structures
• CPC Class Codes: H01L 24/29 of an individual layer connector
• CPC Class Codes: H01L 24/32 of an individual layer connector
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/73 : Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 24/83 : using a layer connector
• CPC Class Codes: H01L 24/90 : Methods for connecting semiconductor or solid state bodies using means for bonding not being attached to, or not being formed on, the body surface to be connected, e.g. pressure contacts using springs or clips
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01028 : Nickel [Ni]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01059 : Praseodymium [Pr]
• CPC Class Codes: H01L 2924/01076 : Osmium [Os]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/01322 : Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/0665 : Epoxy resin
• CPC Class Codes: H01L 2924/0781 : being an ohmic electrical conductor
• CPC Class Codes: H01L 2924/07811 : Extrinsic, i.e. with electrical conductive fillers
• CPC Class Codes: H01L 2924/12044 : OLED
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15153 : the die mounting substrate comprising a recess for hosting the device
• CPC Class Codes: H01L 2924/1517 : Multilayer substrate
• CPC Class Codes: H01L 2924/15192 : Resurf arrangement of the internal vias
• CPC Class Codes: H01L 2924/16195 : Flat cap [not enclosing an internal cavity]
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19042 : being an inductor
• CPC Class Codes: H01L 2924/19043 : being a resistor
• CPC Class Codes: H01L 2924/30105 : Capacitance
• CPC Class Codes: H05K 1/186 : manufactured by mounting on or connecting to patterned circuits before or during embedding

Abstract

The fabrication method of an organic substrate having embedded active-chips such as semiconductor chips is disclosed. The present invention previously applies the conductive adhesives in a wafer state, makes them in a B-stage state, obtains individual semiconductor chips through dicing, and positions the individual semiconductor chips previously applied with the conductive adhesives in the cavities, making it possible to simultaneously obtain an electrical connection and a physical adhesion of the substrate and the semiconductor chips by means of a method of applying heat and pressure and stack the copper clad laminates on the upper portion of the substrate to which the semiconductor chips are connected. The present invention has advantages in processes such as a lead-free process, an environmental-friendly fluxless process, a low temperature process, ultra-fine pitch applications, etc., by mounting the active-chips through the flip chip interconnection using the non-solder bumps and the conductive adhesives.

Claims

1. The fabrication method of an organic substrate having embedded active-chips comprising the steps of:

(a) stacking the second copper clad laminate formed with copper wirings, vias, and cavities on the top surface of the first copper clad laminate formed with the copper wirings or the copper wirings and the vias;

(b) applying anisotropic conductive adhesives or non-conductive adhesives to the front side of a semiconductor wafer and then positioning semiconductor chips diced into individual chips inside the cavities of the second copper clad laminate and connecting the copper wirings of the first copper clad laminate to a flip chip by applying heat and pressure; and

(c) stacking the third copper clad laminate formed with the copper wirings or the copper wirings and the vias on the top surface of the second copper clad laminate to which the semiconductor chips are connected.

2. The method according to claim 1, wherein the semiconductor chips of the step (b) are fabricated comprising the steps of:

forming non-solder bumps on the I/Os of each chip on a light and slim wafer of 200 μ

m or less using a gold wire bonding method or a nickel/gold plating method;

applying the anisotropic conductive adhesives or the non-conductive adhesives in a B-stage state to the upper portion of the wafer formed with the non-solder bumps; and

dicing the wafer applied with the anisotropic conductive adhesives or the non-conductive adhesives into individual semiconductor chips.

3. The method according to claim 1, wherein after the step (b), the organic substrate having the embedded active-chips is fabricated by repeating the same method as the step (b) by forming the cavities at different positions from the cavities formed on the copper clad laminate to which the semiconductor chips are connected and stacking the copper clad laminates formed with the copper wirings and the vias.

4. The method according to claim 2, wherein the anisotropic conductive adhesives or the non-conductive adhesives is a film form or a paste form.

5. The method according to claim 1, wherein the flip chip connection in the step (b) is performed by applying heat of 150 to 200°

C. and pressure of 20 to 100 psi for 10 to 20 seconds.

6. The method according to claim 1, wherein the material of the organic substrate is BT, FR04 or FR05.