IGBT/FET-BASED ENERGY SAVINGS DEVICE, SYSTEM AND METHOD

• US 20090046490A1
• Filed: 08/04/2008
• Published: 02/19/2009
• Est. Priority Date: 08/13/2007
• Status: Active Grant

• Current Assignee: Powerwise Group, Inc.
• Original Assignee: Powerwise Group, Inc.
• Inventors: Lumsden, John L.
• Granted Patent: US 8,085,009 B2
• Time in Patent Office: Days
• US Class Current: 363/124
• CPC Class Codes: H02M 3/158 including plural semiconductor devices as final control devices for a single load
• CPC Class Codes: H02M 5/293 using semiconductor devices only

Abstract

An IGBT/FET-based energy savings device, system and method (1) wherein a predetermined amount of voltage below a nominal line voltage and/or below a nominal appliance voltage is saved, thereby conserving energy. Phase input connections (2) are provided for inputting analog signals into the device and system (1). A magnetic flux concentrator (3) senses the incoming analog signal (20) and a volts zero crossing point detector (5) determines the zero volts crossing point (21) of the signal (20). The positive half cycle (22) and negative half cycle (23) of the signal (20) are identified and routed to a digital signal processor (10) for processing the signal (20). The signal (20) is reduced by pulse width modulation and the reduced amount of energy is outputted, thereby yielding an energy savings for an end user.

Claims

1. An IGBT/FET-based energy savings device comprising:

at least one phase input connection for inputting a predetermined amount of incoming energy having at least one analog signal into said energy savings device;

at least one magnetic flux concentrator connected to said at least one phase input connection for sensing said predetermined amount of incoming energy entered into said energy savings device;

at least one volts zero crossing point detector in electrical connection with said at least one phase input connection for determining at least one zero volts crossing point of said at least one analog signal;

at least one half cycle identifier in electrical connection with said at least one phase input connection for identifying at least one positive half cycle of said at least one analog signal and at least one negative half cycle of said at least one analog signal;

at least one logic device in electrical connection with said at least one volts zero crossing point detector and at least one half cycle identifier for routing said at least one positive half cycle of said at least one analog signal and said at least one negative half cycle of said at least one analog signal to at least one digital signal processor for processing said at least one analog signal;

at least one digital signal processor in electrical connection with said at least one logic device for processing said at least one analog signal;

at least one voltage reducing means having at least one drive control wherein said at least one voltage reducing means is in electrical connection with said at least one digital signal processor for reducing said predetermined amount of incoming energy by providing pulse width modulation to the at least one analog signal to yield a reduced amount of energy; and

at least one phase output connection in electrical connection with said at least one voltage reducing means for outputting said reduced amount of energy out of said energy savings device.

2. The IGBT/FET-based energy savings device of claim 1 further comprising:

at least one analog signal conditioning device for conditioning said at least one analog signal of said energy exiting said at least one magnetic flux concentrator.

3. The IGBT/FET-based energy savings device of claim 1 further comprising:

at least one power supply unit in electrical connection with said energy savings device for powering said energy savings device.

4. The IGBT/FET-based energy savings device of claim 1 further comprising:

at least computing device in electrical connection with said energy savings device.

5. The IGBT/FET-based energy savings device of claim 4 further comprising:

at least one USB communications interface in electrical connection between said at least one digital signal processor and said at least one computing device.

6. The IGBT/FET-based energy savings device of claim 1 wherein:

said at least one phase input connection is a single phase power system.

7. The IGBT/FET-based energy savings device of claim 1 wherein:

said at least one phase input connection is a bi-phase power system.

8. The IGBT/FET-based energy savings device of claim 1 wherein:

said at least one phase input connection is a three-phase power system.

9. The IGBT/FET-based energy savings device of claim 1 wherein:

said at least one magnetic flux concentrator measures said predetermined amount of energy via galvanic isolation.

10. The IGBT/FET-based energy savings device of claim 9 wherein:

said magnetic flux concentrator is located on at least one printed circuit board;

said at least one printed circuit board is located on at least one housing; and

said housing is removably securable to a conductor electrically connecting said at least one phase input connection to said at least one analog signal conditioning device.

11. The IGBT/FET-based energy savings device of claim 10 wherein:

said at least one housing includes a top half and a bottom half hingedly secured to one another.

12. The IGBT/FET-based energy savings device of claim 2 wherein:

said at least one analog signal conditioning device has a first filter for removing or reducing harmonics and transients or interfering signals of said energy exiting said at least one magnetic flux concentrator.

13. The IGBT/FET-based energy savings device of claim 12 wherein:

said at least one analog signal conditioning device has a second filter for permitting at least one phase change if necessary.

14. The IGBT/FET-based energy savings device of claim 1 wherein:

said at least one volts zero crossing point detector for determining at least one volts zero crossing point of said at least one analog signal is at least one comparator and at least one Schmidt buffer.

15. The IGBT/FET-based energy savings device of claim 14 wherein:

said at least one comparator has a reference point of approximately half a supply voltage.

16. The IGBT/FET-based energy savings device of claim 1 further comprising:

at least one lost phase detection device in electrical connection with said at least one analog signal conditioning device.

17. The IGBT/FET-based energy savings device of claim 1 further comprising:

at least one phase rotation device in electrical connection with said at least one analog signal conditioning device.

18. The IGBT/FET-based energy savings device of claim 16 further comprising:

at least one phase rotation device in electrical connection with said at least one analog signal conditioning device.

19. The IGBT/FET-based energy savings device of claim 1 wherein:

said at least one half cycle identifier identifies an absolute zero cross signal.

20. The IGBT/FET-based energy savings device of claim 1 wherein:

said at least one logic device is programmable.

21. The IGBT/FET-based energy savings device of claim 1 wherein:

said at least one logic device operates in real-time.

22. The IGBT/FET-based energy savings device of claim 1 further comprising:

at least one floating power supply in electrical connection with said at least one voltage reducing means.

23. The IGBT/FET-based energy savings device of claim 1 wherein:

said at least one phase output connection is a single phase output system.

24. The IGBT/FET-based energy savings device of claim 1 wherein:

said at least one phase output connection is a bi-phase output system.

25. The IGBT/FET-based energy savings device of claim 1 wherein:

said at least one phase output connection is a three-phase output system.

26. The IGBT/FET-based energy savings device of claim 1 further comprising:

at least one reset switch in electrical connection with said at least one digital signal processor.

27. The IGBT/FET-based energy savings device of claim 26 further comprising:

at least one light emitting diode in electrical connection with said at least one reset switch.

28. The IGBT/FET-based energy savings device of claim 5 wherein:

said at least one USB communications interface permits a user to monitor said predetermined amount of energy inputted into said energy savings system and said reduced energy outputted from said energy savings system.

29. An IGBT/FET-based energy savings device comprising:

at least one power supply unit in electrical connection with said energy savings device for powering said energy savings device;

at least one phase input connection for inputting a predetermined amount of incoming energy having at least one analog signal into said energy savings device;

at least one magnetic flux concentrator connected to said at least one phase input connection for sensing said predetermined amount of incoming energy entered into said energy savings device via galvanic isolation;

at least one analog signal conditioning device for conditioning said at least one analog signal of said energy exiting said at least one magnetic flux concentrator;

at least one volts zero crossing point detector in electrical connection with said at least one phase input connection for determining at least one zero volts crossing point of said at least one analog signal;

at least one half cycle identifier in electrical connection with said at least one phase input connection for identifying at least one positive half cycle of said at least one analog signal and at least one negative half cycle of said at least one analog signal;

at least one logic device in electrical connection with said at least one volts zero crossing point detector and at least one half cycle identifier for routing said at least one positive half cycle of said at least one analog signal and said at least one negative half cycle of said at least one analog signal to at least one digital signal processor for processing said at lest one analog signal;

at least one digital signal processor in electrical connection with said at least one logic device for processing said at least one analog signal;

at least one voltage reducing means having at least one drive control wherein said at least one voltage reducing means is in electrical connection with said at least one digital signal processor for reducing said predetermined amount of incoming energy to yield a reduced amount of energy by providing pulse width modulation to the at least one analog signal;

at least one phase output connection in electrical connection with said at least one voltage reducing means for outputting said reduced energy out of said energy savings device;

at least one reset switch in electrical connection with said at least one digital signal processor;

at least one USB communications interface in electrical connection with said at least one digital signal processor; and

at least computing device in electrical connection with said energy savings device.

30. The IGBT/FET-based energy savings device of claim 29 further comprising:

at least one phase rotation device in electrical connection with said at least one analog signal conditioning device.

31. An IGBT/FET-based energy savings system comprising:

a means for inputting a predetermined amount of incoming energy into said energy savings system;

a means for sensing said predetermined amount of incoming energy entered into said energy savings system;

a means for conditioning at least one analog signal of said energy;

a means for determining at least one volts zero crossing point of said at least one conditioned analog signal;

a means for identifying at least one positive half cycle and at least one negative half cycle of said at least one conditioned analog signal;

a means for routing said at least one positive half cycle of said at least one analog signal and said at least one negative half cycle of said at least one analog signal to at least one digital signal processor for processing said at lest one analog signal;

a means for processing said at least one conditioned analog signal;

a means for reducing said at least one conditioned analog signal of said predetermined amount of energy to yield a reduced amount of energy; and

a means for outputting said reduced energy out of said energy savings system.

32. The IGBT/FET-based energy savings system of claim 31 wherein:

said means for reducing said predetermined amount of energy is via pulse width modulation.

33. The IGBT/FET-based energy savings system of claim 31 further comprising:

a means for communicating with at least one computing device.

34. The IGBT/FET-based energy savings system of claim 31 further comprising:

a means for resetting said energy savings system.

35. The IGBT/FET-based energy savings system of claim 32 further comprising:

a means for communicating with at least one computing device.

36. The IGBT/FET-based energy savings system of claim 33 further comprising:

a means for communicating with at least one computing device.

37. The IGBT/FET-based energy savings system of claim 31 wherein:

said means for sensing said predetermined amount of energy entered into said energy savings system is at least one magnetic flux concentrator that measures current with galvanic isolation.

38. The IGBT/FET-based energy savings system of claim 31 wherein:

said means for conditioning at least one analog signal of said energy is at least one analog signal conditioning device that substantially reduces harmonics and any transients or interfering signals in said at least one analog signal.

39. The IGBT/FET-based energy savings system of claim 31 wherein:

said means for determining at least one volts zero crossing point of said at least one conditioned analog signal is at least one volts zero crossing point detector having at least one comparator and at least one Schmidt buffer.

40. The IGBT/FET-based energy savings system of claim 31 wherein:

said means for identifying at least one positive half cycle and at least one negative half cycle of said at least one conditioned analog signal is at least one half cycle identifier.

41. The IGBT/FET-based energy savings system of claim 31 wherein:

said means for routing said at least one positive half cycle of said at least one analog signal and said at least one negative half cycle of said at least one analog signal to at least one digital signal processor for processing said at lest one analog signal is at least one logic device.

42. The IGBT/FET-based energy savings system of claim 41 wherein:

said at least one logic device is programmable.

43. The IGBT/FET-based energy savings system of claim 31 wherein:

said means for processing said at least one conditioned analog signal is at least one digital signal processor that performs a pulse width modulation function.

44. The IGBT/FET-based energy savings system of claim 32 wherein:

said pulse width modulation is via at least one IGBT driver.

45. The IGBT/FET-based energy savings system of claim 32 wherein:

said pulse width modulation is via at least one FET driver.

46. The IGBT/FET-based energy savings system of claim 31 further comprising:

a means for powering said energy savings system.

47. The IGBT/FET-based energy savings system of claim 31 further comprising:

a means for detecting loss of said means for inputting a predetermined amount of energy into said energy savings system.

48. The IGBT/FET-based energy savings system of claim 31 further comprising:

a means for rotating said means for inputting a predetermined amount of energy into said energy savings system.

49. The IGBT/FET-based energy savings system of claim 47 wherein:

said means for detecting loss of said means for inputting a predetermined amount of energy into said energy savings system is at least one lost phase detection device in electrical connection with said means for conditioning said at least one analog signal of said energy.

50. The IGBT/FET-based energy savings system of claim 48 wherein:

said means for rotating said means for inputting a predetermined amount of energy into said energy savings system is at least one phase rotation device in electrical connection with said means for conditioning said at least one analog signal of said energy.

51. A method for using an IGBT/FET-based energy savings device comprising at least one phase input connection for inputting a predetermined amount of incoming energy having at least one analog signal into said energy savings device;

at least one magnetic flux concentrator connected to said at least one phase input connection for sensing said predetermined amount of incoming energy entered into said energy savings device;

at least one volts zero crossing point detector in electrical connection with said at least one phase input connection for determining at least one zero volts crossing point of said at least one analog signal;

at least one half cycle identifier in electrical connection with said at least one phase input connection for identifying at least one positive half cycle of said at least one analog signal and at least one negative half cycle of said at least one analog signal;

at least one logic device in electrical connection with said at least one volts zero crossing point detector and at least one half cycle identifier for routing said at least one positive half cycle of said at least one analog signal and said at least one negative half cycle of said at least one analog signal to at least one digital signal processor for processing said at lest one analog signal;

at least one digital signal processor in electrical connection with said at least one logic device for processing said at least one analog signal;

at least one voltage reducing means having at least one drive control wherein said at least one voltage reducing means is in electrical connection with said at least one digital signal processor for reducing said predetermined amount of incoming energy by providing pulse width modulation to the at least one analog signal to yield a reduced amount of energy; and

at least one phase output connection in electrical connection with said at least one voltage reducing means for outputting said reduced energy out of said energy savings device, said method comprising steps of;

a. inputting a predetermined amount of energy having at least one analog signal into said energy savings device;

b. sensing said predetermined amount of energy entered into said energy savings device;

c. determining at least one volts zero crossing point of said at least one analog signal;

d. identifying at least one positive half cycle of said at least one analog signal and at least one negative half cycle of said at least one analog signal;

e. routing said at least one positive half cycle of said at least one analog signal and said at least one negative half cycle of said at least one analog signal to said at least one digital signal processor;

f. processing said at least one analog signal;

g. reducing said predetermined amount of energy by providing pulse width modulation to said at least one analog signal; and

h. outputting said reduced amount of energy out of said energy savings device.

52. The method of claim 51 further comprising a step after step c of:

detecting at least one loss of said at least one phase input connection.

53. The method of claim 52 further comprising a step after detecting at least one loss of said at least one phase input connection of:

reporting said at least one loss to said at least one logic device.

54. The method of claim 52 further comprising a step after detecting at least one loss of said at least one phase input connection of:

rotating remaining phase input connections.

55. The method of claim 53 further comprising a step after reporting said at least one loss to said at least one logic device of:

rotating remaining phase input connections.

56. The method of claim 51 further comprising a step after step f of:

conditioning said at least one analog signal.

57. The method of claim 55 further comprising a step after processing said at least one analog signal of:

conditioning said at least one analog signal.

58. The method of claim 51 further comprising a step prior to step a of:

powering said energy savings device.

59. The method of claim 51 further comprising a step prior to step a of:

programming an energy savings amount into said energy savings device.

60. The method of claim 51 further comprising a step after step h of:

programming an energy savings amount into said energy savings device.

61. The method of claim 60 further comprising a step after powering said energy savings device of:

programming an energy savings amount into said energy savings device.

62. The method of claim 51 prior to step e of:

pulse width modulating said at least one analog signal.

63. The method of claim 51 further comprising a step prior to step f of:

pulse width modulating said at least one analog signal.

64. The method of claim 51 further comprising a step after step g of:

sensing said reduced amount of energy.

65. The method of claim 51 wherein:

said pulse width modulation is accomplished via at least one IGBT.

66. The method of claim 51 wherein:

said pulse width modulation is accomplished via at least one FET.

67. A method for using an IGBT/FET-based energy savings comprising a means for inputting a predetermined amount of energy into said energy savings system;

a means for sensing said predetermined amount of energy entered into said energy savings system;

a means for conditioning at least one analog signal of said energy;

a means for determining at least one volts zero crossing point of said at least one conditioned analog signal;

a means for identifying at least one positive half cycle and at least one negative half cycle of said at least one conditioned analog signal;

a means for routing said at least one positive half cycle of said at least one analog signal and said at least one negative half cycle of said at least one analog signal to at least one digital signal processor for processing said at lest one analog signal;

a means for processing said at least one conditioned analog signal;

a means for reducing said at least one conditioned analog signal of said predetermined amount of energy; and

a means for outputting said reduced energy out of said energy savings system, said method comprising steps of;

a. inputting a predetermined amount of incoming energy having at least one analog signal into said energy savings system;

b. sensing said predetermined amount of incoming energy entered into said energy savings system;

c. determining at least one volts zero crossing point of said at least one analog signal;

d. identifying at least one positive half cycle of said at least one analog signal and at least one negative half cycle of said at least one analog signal;

e. routing said at least one positive half cycle of said at least one analog signal and said at least one negative half cycle of said at least one analog signal to said at least one digital signal processor;

f. processing said at least one analog signal;

g. reducing said predetermined amount of energy by providing pulse width modulation to said at least one analog signal to yield a reduced amount of energy; and

h. outputting said reduced amount of energy out of said energy savings system.

68. The method of claim 67 wherein:

said pulse width modulation is accomplished via at least one IGBT.

69. The method of claim 68 wherein:

said pulse width modulation is accomplished via at least one FET.

76. The method of claim 69 wherein:

said pulse width modulation is accomplished via at least one IGBT.

77. The method of claim 69 wherein:

said pulse width modulation is accomplished via at least one FET.

70. A method for using an IGBT/FET-based energy savings comprising at least one phase input connection for inputting a predetermined amount of incoming energy having at least one analog signal into said energy savings device;

at least one magnetic flux concentrator connected to said at least one phase input connection for sensing said predetermined amount of incoming energy entered into said energy savings device;

at least one volts zero crossing point detector in electrical connection with said at least one phase input connection for determining at least one zero volts crossing point of said at least one analog signal;

at least one half cycle identifier in electrical connection with said at least one phase input connection for identifying at least one positive half cycle of said at least one analog signal and at least one negative half cycle of said at least one analog signal;

at least one logic device in electrical connection with said at least one volts zero crossing point detector and at least one half cycle identifier for routing said at least one positive half cycle of said at least one analog signal and said at least one negative half cycle of said at least one analog signal to at least one digital signal processor for processing said at lest one analog signal;

at least one digital signal processor in electrical connection with said at least one logic device for processing said at least one analog signal;

at least one voltage reducing means in electrical connection with said at least one digital signal processor for reducing said predetermined amount of incoming energy by providing pulse width modulation to the at least one analog signal to yield a reduced amount of energy; and

at least one phase output connection in electrical connection with said at least one voltage reducing means for outputting said reduced energy out of said energy savings device, said method comprising steps of;

a. inputting a predetermined amount of incoming energy having at least one analog signal into said energy savings device;

b. sensing said predetermined amount of incoming energy entered into said energy savings device;

c. determining at least one volts zero crossing point of said at least one analog signal;

d. identifying at least one positive half cycle of said at least one analog signal;

e. routing said at least one positive half cycle of said at least one analog signal to said at least one digital signal processor;

f. processing said at least one analog signal;

g. reducing said predetermined amount of energy by providing pulse width modulation to said at least one analog signal to yield a reduced amount of energy; and

h. outputting said reduced amount of energy out of said energy savings device.

71. The method of claim 70 further comprising a step after step d of:

identifying at least one negative half cycle of said at least one analog signal.

72. The method of claim 71 further comprising a step after identifying at least one negative half cycle of said at least one analog signal of:

routing said at least one negative half cycle of said at least one analog signal to said at least one digital signal processor.

73. A method for using an IGBT/FET-based energy savings comprising at least one phase input connection for inputting a predetermined amount of incoming energy having at least one analog signal into said energy savings device;

at least one magnetic flux concentrator connected to said at least one phase input connection for sensing said predetermined amount of incoming energy entered into said energy savings device;

at least one volts zero crossing point detector in electrical connection with said at least one phase input connection for determining at least one zero volts crossing point of said at least one analog signal;

at least one half cycle identifier in electrical connection with said at least one phase input connection for identifying at least one positive half cycle of said at least one analog signal and at least one negative half cycle of said at least one analog signal;

at least one logic device in electrical connection with said at least one volts zero crossing point detector and at least one half cycle identifier for routing said at least one positive half cycle of said at least one analog signal and said at least one negative half cycle of said at least one analog signal to at least one digital signal processor for processing said at lest one analog signal;

at least one digital signal processor in electrical connection with said at least one logic device for processing said at least one analog signal;

at least one voltage reducing means in electrical connection with said at least one digital signal processor for reducing said predetermined amount of energy by providing pulse width modulation to the at least one analog signal; and

at least one phase output connection in electrical connection with said at least one voltage reducing means for outputting said reduced energy out of said energy savings device, said method comprising steps of;

a. inputting a predetermined amount of incoming energy having at least one analog signal into said energy savings device;

b. sensing said predetermined amount of incoming energy entered into said energy savings device;

c. determining at least one volts zero crossing point of said at least one analog signal;

d. identifying at least one negative half cycle of said at least one analog signal;

e. routing said at least one negative half cycle of said at least one analog signal to said at least one digital signal processor;

f. processing said at least one analog signal;

g. reducing said predetermined amount of incoming energy by providing pulse width modulation to said at least one analog signal to yield a reduced amount of energy; and

h. outputting said reduced amount of energy out of said energy savings device.

74. The method of claim 73 further comprising a step after step d of:

identifying at least one positive half cycle of said at least one analog signal.

75. The method of claim 74 further comprising a step after identifying at least one positive half cycle of said at least one analog signal of:

routing said at least one positive half cycle of said at least one analog signal to said at least one digital signal processor.