LOW-COST NON-VOLATILE FLASH-RAM MEMORY

• US 20090046501A1
• Filed: 07/30/2008
• Published: 02/19/2009
• Est. Priority Date: 04/27/2006
• Status: Active Grant

• Current Assignee: Avalanche Technology Incorporated
• Original Assignee: Yadav Technology Inc.
• Inventors: ASSAR, Mahmud, KESHTBOD, Parviz, RANJAN, Rajiv Yadav
• Granted Patent: US 8,120,949 B2
• Time in Patent Office: Days
• US Class Current: 365/171
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G11C 11/15 using multiple magnetic layers G11C11/155 takes precedence
• CPC Class Codes: G11C 11/161 details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell
• CPC Class Codes: G11C 11/1659 Cell access
• CPC Class Codes: G11C 11/1675 Writing or programming circuits or methods
• CPC Class Codes: G11C 14/00 Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
• CPC Class Codes: H01L 27/105 including field-effect components
• CPC Class Codes: H10B 61/10 comprising components having two electrodes, e.g. diodes or MIM elements

Abstract

A flash-RAM memory includes non-volatile random access memory (RAM) formed on a monolithic die and non-volatile page-mode memory formed on top of the non-volatile RAM, the non-volatile page-mode memory and the non-volatile RAM reside on the monolithic die.

Claims

1. A flash-RAM memory comprising:

non-volatile random access memory (RAM) formed on a monolithic die; and

non-volatile page-mode memory formed on top of the non-volatile RAM, the non-volatile page-mode memory and the non-volatile RAM residing on the monolithic die.

2. A flash-RAM memory, as recited in claim 1, wherein said non-volatile RAM includes non-volatile magnetic memory made of an array of magnetic memory cells, each magnetic memory cells being made of a magnetic tunnel junction (MTJ).

3. A flash-RAM memory, as recited in claim 2, wherein said non-volatile page-mode memory includes non-volatile magnetic memory made of an array of magnetic memory cells, each magnetic memory cells being made of a magnetic tunnel junction (MTJ).

4. A flash-RAM memory, as recited in claim 3, wherein

transistors are coupled to the non-volatile RAM and magnetic memory and

formed on silicon thereby avoiding physical contact with the monolithic die.

5. The flash-RAM memory, as recited in claim 4, wherein the array of magnetic memory elements comprise one or more stacks of memory elements, each stack being separated from the other by oxide.

6. The flash-RAM memory, as recited in claim 3, wherein at least one of the memory cells includes a diode.

7. The flash-RAM memory, as recited in claim 3, wherein at least one of the memory cells includes a zener diode.

8. A computer system comprising:

a host; and

flash-RAM coupled to the host configured to store data, the flash-RAM including, non-volatile random access memory (RAM) formed on a monolithic die; and

non-volatile page-mode memory formed on top of the non-volatile RAM, the non-volatile page-mode memory and the non-volatile RAM residing on the monolithic die, each of the non-volatile RAM and the non-volatile page-mode memory including magnetic memory cells made of a magnetic tunnel junction (MTJ), the magnetic memory formed on the monolithic die; and

transistors coupled to the non-volatile RAM and the magnetic memory and formed on silicon thereby avoiding physical contact with the monolithic die.

9. A computer system as recited in claim 8 wherein the magnetic memory cells further include a thin-film diode coupled to the magnetic tunnel junction.

10. A computer system as recited in claim 8 wherein the array of magnetic memory elements comprise one or more stacks of memory elements, each stack being separated from the other by oxide.

11. A computer system as recited in claim 8, wherein at least one of the memory cells includes a diode.

12. A computer system as recited in claim 8, wherein at least one of the memory cells includes a zener diode.

13. A computer system as recited in claim 8, wherein the flash-RAM is used to store boot code.

14. A computer system as recited in claim 8, wherein the flash-RAM is used to provide an instant-on system image of the hard disk drive, save data in case of a power-outage, and the like.

15. A computer system as recited in claim 8, wherein the flash-RAM is used to save data in case of a power-outage.

16. A computer system as recited in claim 8, wherein the memory elements comprise a one-time programmable memory.

19. The method of manufacturing a flash-RAM as recited in claim 17, wherein depositing another layer of silicon oxide and silicon nitride and repeating the steps e. through h. and the step of claim 16 and deposit yet another layer of silicon oxide and silicon nitride and perform CMP thereof.

17. A method of manufacturing a flash-RAM comprising:

a. forming CMOS circuitry;

b. depositing a first metal layer upon the CMOS circuitry;

c. depositing a magnetic tunnel junction layer on top of the metal layer to form a non-volatile random-access-memory (RAM);

d. depositing silicon oxide and silicon nitride on top of the non-volatile RAM;

e. performing chemical mechanical polishing (CMP) on the deposited silicon oxide and silicon nitride thereby leaving a smooth surface of silicon oxide and silicon nitride;

f. depositing a metal layer on top of the smooth surface;

g. depositing a diode layer on top of the metal layer;

h. depositing magnetic tunnel junction (MTJ) on top of the diode layer.

18. The method of manufacturing a flash-RAM as recited in claim 17, further including etching the MTJ and the diode layer.