Method and System for Dynamic Voltage and Frequency Scaling (DVFS)

• US 20090049314A1
• Filed: 08/12/2008
• Published: 02/19/2009
• Est. Priority Date: 08/13/2007
• Status: Abandoned Application

• Current Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Original Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Inventors: Wright, John, Gosali, Sani, Sollenberger, Nelson, Gong, Zhijun, Taha, Ali
• Application Number:
  US12/190,029
• Publication Number:
  US 20090049314A1
• Time in Patent Office: Days
• US Class Current: 713/300
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/324 by lowering clock frequency
• CPC Class Codes: G06F 1/3296 by lowering the supply or operating voltage
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

Methods and systems for dynamic voltage and frequency scaling (DVFS) may include monitoring change in resource utilization of an electronic device. If the change is greater than a threshold amount, a frequency of at least one clock and/or voltage for at least one voltage island may be adjusted. The resource utilization may be measured as, for example, a number of instructions executed per second. The frequency and/or voltage adjustment may depend on one or more operating points that may correspond to a power management state. An interrupt received in a power management state may also indicate an operating point. If resource utilization has increased, the frequency/voltage may be increased. Similarly, in cases where resource utilization has decreased, the frequency/voltage may be decreased. Voltage to circuits using the clock may be increased prior to increasing the clock frequency, and the voltage may be decreased after decreasing the clock frequency.

Claims

1. A method for controlling power consumption, the method comprising:

monitoring resource utilization in an electronic device;

determining a change in said resource utilization that is greater than at least one threshold amount; and

adjusting a frequency of at least one clock in said electronic device and/or voltage for at least one voltage island in said electronic device when said determined change is greater than said threshold amount.

2. The method according to claim 1, wherein monitoring said resource utilization comprises monitoring temperature of at least a portion of at least one chip.

3. The method according to claim 1, wherein monitoring said resource utilization comprises characterizing a speed of at least one chip.

4. The method according to claim 1, wherein said resource utilization comprises a number of instructions executed by a processor within a time period.

5. The method according to claim 1, wherein said resource utilization comprises a rate change in a number of instructions executed by a processor over a plurality of time periods.

6. The method according to claim 1, comprising determining said change in said resource utilization by comparing a number of instructions executed by a processor within a time period to at least one usage threshold and/or comparing a rate change in a number of instructions executed by a processor over a plurality of time periods to at least one rate threshold.

7. The method according to claim 1, comprising increasing said frequency of said at least one clock when said determined change indicates an increase in resource utilization over time.

8. The method according to claim 7, comprising increasing a supply voltage for said at least one voltage island that uses said at least one clock prior to increasing said frequency of said at least one clock.

9. The method according to claim 1, comprising decreasing said frequency of said at least one clock when said determined change indicates a decrease in resource utilization over time.

10. The method according to claim 9, comprising decreasing a supply voltage for said at least one voltage island that uses said at least one clock after decreasing said frequency of said at least one clock.

11. The method according to claim 1, comprising adjusting said frequency of said at least one clock and/or said voltage for said at least one voltage island based on a state of power management.

12. The method according to claim 11, comprising assigning one or more operating points used for said adjusting to each of said state of power management.

13. The method according to claim 11, comprising determining an operating point based on an interrupt received while in said state of power management.

14. The method according to claim 13, comprising selecting a larger of:

said operating point associated with said interrupt and an operating point determined by a dynamic voltage and frequency scaling technique, when said interrupt is a member of one of a specified class of interrupts.

15. A system for controlling power consumption, the system comprising:

one or more circuits in an electronic device that enables monitoring of resource utilization in an electronic device;

said one or more circuits enable determination of a change in said resource utilization that is greater than a threshold amount; and

said one or more circuits enable adjusting of a frequency of at least one clock in said electronic device and/or voltage for at least one voltage island in said electronic device when said determined change is greater than said threshold amount.

16. The system according to claim 15, wherein said one or more circuits are operable to monitor temperature of at least a portion of at least one chip in said electronic device for use with monitoring of said resource utilization.

17. The system according to claim 15, wherein said one or more circuits are operable to characterize a speed of at least one chip in said electronic device for use with monitoring of said resource utilization.

18. The system according to claim 15, wherein said resource utilization comprises a number of instructions executed by a processor within a time period.

19. The system according to claim 15, wherein said resource utilization comprises a rate change in a number of instructions executed by a processor over a plurality of time periods.

20. The system according to claim 15, wherein said one or more circuits are operable to determine said change in said resource utilization by comparing a number of instructions executed by a processor within a time period to at least one usage threshold and/or comparing a rate change in a number of instructions executed by a processor over a plurality of time periods to at least one rate threshold.

21. The system according to claim 15, wherein said one or more circuits enable increasing said frequency of said at least one clock when said determined change indicates an increase in resource utilization over time.

22. The system according to claim 21, wherein said one or more circuits enable increasing a supply voltage for said at least one voltage island that uses said at least one clock prior to increasing said frequency of said at least one clock.

23. The system according to claim 15, wherein said one or more circuits enable decreasing said frequency of said at least one clock when said determined change indicates a decrease in resource utilization over time.

24. The system according to claim 23, wherein said one or more circuits enable decreasing a supply voltage for said at least one voltage island that uses said at least one clock after decreasing said frequency of said at least one clock.

25. The system according to claim 15, wherein said one or more circuits enable adjusting said frequency of said at least one clock and/or said voltage for said at least one voltage island based on a state of power management.

26. The system according to claim 25, wherein one or more operating points used for said adjusting are assigned to each of said state of power management.

27. The system according to claim 25, wherein said one or more circuits enable determination of an operating point based on an interrupt received while in said state of power management.

28. The system according to claim 27, wherein said one or more circuits enable selection of a larger of:

said operating point associated with said interrupt and an operating point determined by a dynamic voltage and frequency scaling technique, when said interrupt is a member of one of a specified class of interrupts.