Ring Oscillation Circuit, Delay Time Measuring Circuit, Testing Circuit, Clock Generating Circuit, Image Sensor, Pulse Generating Circuit, Semiconductor Integrated Circuit, and Testing Method Thereof

• US 20090051396A1
• Filed: 11/30/2006
• Published: 02/26/2009
• Est. Priority Date: 02/02/2006
• Status: Active Grant

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Shimamoto, Yukihiro
• Granted Patent: US 7,855,607 B2
• Time in Patent Office: Days
• US Class Current: 327/153
• CPC Class Codes: G01R 29/26 Measuring noise figure; Measuring signal-to-noise ratio
• CPC Class Codes: G01R 31/31709 Jitter measurements; Jitter generators measuring jitter, noise figure or signal-to-noise ratio per se G01R29/26; analysis of tester signals G01R31/31901
• CPC Class Codes: G01R 31/31725 Timing aspects, e.g. clock distribution, skew, propagation delay for tester hardware G01R31/31937
• CPC Class Codes: H03K 3/0315 Ring oscillators
• CPC Class Codes: H03K 5/135 by the use of time reference signals, e.g. clock signals
• CPC Class Codes: H03K 5/1534 Transition or edge detectors

Abstract

A ring oscillation circuit, which can operate the ring oscillation due to a positive feedback stably and continuously, is provided and it is applied to an accurate measurement of delay time and a measurement of timing accuracy in a jitter of a clock signal or the like with a high accuracy. A ring oscillation circuit comprises a delay circuit and a monostable multivibrator. An output of the delay circuit is connected to an input of the monostable multivibrator, an output of the monostable multivibrator is connected to an input of the delay circuit, and the delay circuit and the monostable multivibrator configure a positive feedback loop. An oscillation starting circuit for starting oscillation upon receipt of an input of a trigger pulse for triggering oscillation is provided on the positive feedback loop, or in the inside of the delay circuit or the monostable multivibrator.

Claims

1. A ring oscillation circuit comprising:

a delay circuit; and

a monostable multivibrator, wherein

an output of the delay circuit is connected to an input of the monostable multivibrator,

an output of the monostable multivibrator is connected to an input of the delay circuit, and

the delay circuit and the monostable multivibrator configure a positive feedback loop.

2. The ring oscillation circuit according to claim 1 comprising

an oscillation starting circuit for starting oscillation upon receipt of an input of a trigger signal for triggering oscillation on the positive feedback loop.

3. The ring oscillation circuit according to claim 1, wherein

a pulse width of a pulse signal to be outputted by the monostable multivibrator is shorter than one period of a ring oscillation operation in the positive feedback loop.

4. The ring oscillation circuit according to claim 3, wherein

in the case that the pulse width of the pulse signal to be outputted by the monostable multivibrator is decreased due to a propagation time difference between a rising edge propagation time and a falling edge propagation time of the delay circuit, the pulse width is longer than the propagation time difference.

5. The ring oscillation circuit according to claim 3, wherein

in the case that the pulse width of the pulse signal to be outputted by the monostable multivibrator is increased due to a propagation time difference between a rising edge propagation time and a falling edge propagation time of the delay circuit, a sum of the pulse width and the propagation time difference is shorter than one period of the ring oscillation operation in the positive feedback loop.

6. A delay time measuring circuit for measuring a delay time of a circuit to be measured, the delay time measuring circuit comprising:

a monostable multivibrator; and

an oscillation frequency measuring circuit, wherein

an input of the monostable multivibrator can be connected to an output of the circuit to be measured,

an output of the monostable multivibrator can be connected to an input of the circuit to be measured,

the input and the output of the monostable multivibrator are connected to the output and the input of the circuit to be measured, respectively, and thereby, the circuit to be measured and the monostable multivibrator configure a positive feedback loop, and

when measuring an oscillation frequency of the ring oscillation operation due to the positive feedback loop, the oscillation frequency measuring circuit can be connected to the positive feedback loop.

7. A delay time measuring method for measuring a delay time of a circuit to be measured using a delay time measuring circuit, the delay time measuring circuit according to claim 6, the delay time measuring method comprising:

starting the ring oscillation operation due to the positive feedback by connecting the input of the monostable multivibrator to the output of the circuit to be measured, and connecting the output of the monostable multivibrator to the input of the circuit to be measured;

measuring an oscillation frequency of the ring oscillation operation due to the positive feedback using the oscillation frequency measuring circuit; and

measuring the delay time of the circuit to be measured on the basis of a measurement result of the oscillation frequency measuring circuit.

8. The delay time measuring method according to claim 7 comprising:

using a monostable multivibrator for outputting a rising pulse signal of a predetermined pulse width with respect to a rising edge or a falling edge of an input signal when a rising edge propagation time is measured as the delay time of the circuit to be measured; and

using a monostable multivibrator for outputting a falling pulse signal of a predetermined pulse width with respect to a falling edge or a rising edge of an input signal when a falling edge propagation time is measured as the delay time of the circuit to be measured.

9. A testing circuit for evaluating a timing accuracy of a clock signal, the testing circuit comprising:

a variable delay circuit, capable of controlling a delay time;

a phase comparing circuit for comparing a phase of the clock signal of a testing object with a phase of a delay clock signal obtained by delaying the clock signal using the variable delay circuit;

a number counter for counting a number of outputs with respect to a predetermined comparison result from the phase comparing circuit;

a monostable multivibrator;

a signal switching circuit for switching a signal to be inputted into the variable delay circuit from the clock signal to a delay signal to be positively returned via the variable delay circuit and the monostable multivibrator to form a ring oscillator due to a positive feedback; and

a frequency measuring circuit for measuring an oscillation frequency when the ring oscillator is formed by the signal switching circuit.

10. The testing circuit according to claim 9, wherein

the testing circuit and a clock generating circuit for generating the clock signal of the testing object are formed on a common substrate.

11. A testing method for evaluating a timing accuracy of a clock signal using a test circuit, the test circuit according to claim 9, the testing method comprising at the time of measuring the delay time of the variable delay circuit:

forming a ring oscillator due to a positive feedback by switching a signal to be inputted into the variable delay circuit from the clock signal to a delay signal to be positively returned via the variable delay circuit and the monostable multivibrator using the signal switching circuit;

measuring an oscillation frequency of the ring oscillator by the oscillation frequency measuring circuit; and

measuring the delay time of the variable delay circuit on the basis of a measurement result of the oscillation frequency measuring circuit.

12. A clock generating circuit for generating a clock signal by using a PLL circuit, the clock generating circuit comprising at least:

the variable delay circuit;

the monostable multivibrator; and

the signal switching circuit,

of the testing circuit according to claim 9 having the clock signal as the testing object.

13. An image sensor comprising:

a light sensor;

memory means for memorizing an output data of the light sensor;

transmitting means for transmitting the output data to be memorized by the memory means; and

a clock generating circuit for generating a clock signal to control each operation of the light sensor, the memory means, and the transmitting means;

wherein

the clock generating circuit for generating a clock signal to control at least the operation of the transmitting means is the clock generating circuit according to claim 12.

14. A pulse generating circuit comprising:

a delay circuit unit for outputting at least two different delay signals with respect to an input clock signal and adjusting a delay time of a second delay signal from the input clock signal, the second delay signal being a later signal among the two different delay signals;

a monostable multivibrator;

a control circuit for controlling a signal connection in order to individually form a first positive feedback loop, in which an output signal of the monostable multivibrator returns to an input of the monostable multivibrator via a signal delay path from the input clock signal to the second delay signal within the delay circuit unit, and a second positive feedback loop, in which the output signal of the monostable multivibrator returns to the input of the monostable multivibrator without being routed through the signal delay path, and adjusting a delay time of a variable delay circuit;

an oscillation frequency measuring circuit for measuring an oscillation frequency of any one of the formed positive feedback loops with any one of the first positive feedback loop and the second positive feedback loop being individually formed; and

a pulse generating circuit for generating a pulse signal from the input clock signal and the two different delay signals, the pulse signal having at least two times of the rising edges or the falling edges within one period of the input clock signal and a time difference between the two times of the rising edge or the falling edge equal to the delay time of the second delay signal from the input clock signal.

15. The pulse generating circuit according to claim 14, wherein

the delay circuit unit is formed by cascade-connecting two delay circuits, at least one of the two delay circuits being a variable delay circuit capable of adjusting a delay time, and

the two delay circuits individually output the two different delay signals.

16. The pulse generating circuit according to claim 14, wherein

the delay circuit unit is formed by arranging two delay circuits in parallel, at least one of the two delay circuits being a variable delay circuit capable of adjusting a delay time, and

the two delay circuits receive the same input clock signal and individually output the two different delay signals.

17. The pulse generating circuit according to claim 15, wherein

one of the two delay circuits is a fixed delay circuit having a fixed delay time.

18. The pulse generating circuit according to claim 16, wherein

one of the two delay circuits is a fixed delay circuit having a fixed delay time.

19. The pulse generating circuit according to claim 14 comprising

a selecting circuit for alternatively selecting the pulse signal and the input clock signal in response to an input of an external control signal and outputting the selected signal.

20. The pulse generating circuit according to claim 19 comprising

a second pulse generating circuit for generating a second pulse signal to be outputted in synchronization with a time period in which the selecting circuit is selecting the pulse signal, from a first delay signal and the external control signal, the first delay signal being a faster signal among the two different delay signals.

21. A semiconductor integrated circuit capable of conducting a delay test according to a scan path method, the semiconductor integrated circuit incorporating the pulse generating circuit according to claim 19 therein, and using a signal to be outputted from the selecting circuit as a clock pulse of a circuit to be tested being an object of the delay test according to the scan path method.

22. A semiconductor integrated circuit capable of conducting a delay test according to a scan path method, the semiconductor integrated circuit

incorporating the pulse generating circuit according to claim 20 therein,

using a signal to be outputted from the selecting circuit as a clock pulse of the circuit to be tested being the object of the delay test according to the scan path method, and

using the second pulse signal to be outputted from the second pulse generating circuit as a scan enable signal of the circuit to be tested.

23. A testing method of conducting a delay test according to a scan path method on a semiconductor integrated circuit, the testing method comprising:

using the pulse generating circuit according to claim 19; and

using a signal to be outputted from the selecting circuit as a clock pulse of a circuit to be tested being an object of the delay test according to the scan path method.

24. A testing method of conducting a delay test according to a scan path method on a semiconductor integrated circuit, the testing method comprising:

using the pulse generating circuit according to claim 20;

using a signal to be outputted from the selecting circuit as a clock pulse of a circuit to be tested being an object of the delay test according to the scan path method; and

using the second pulse signal to be outputted from the second pulse generating circuit as a scan enable signal of the circuit to be tested.