WIRELESS PHYSIOLOGICAL SENSOR PATCHES AND SYSTEMS
First Claim
1. An asymmetric system comprising:
- two or more ASIC chips wherein the chips are designed to work together to measure physiological signals, comprising;
(a) a patch-ASIC chip adapted for incorporation into a physiological signal monitoring patch comprising a sensor interface, a processor coupled to the sensor interface, a memory element coupled to the processor, a radio coupled to the memory element that transmits data to a base-ASIC chip, and power management circuits that coordinate power usage on the chip; and
(b) the base-ASIC chip, comprising a processor that processes sensor data, a memory element coupled to the processor, a radio coupled to the memory element that communicates instructions to the patch-ASIC chip, power management circuits for coordinating power usage on the chip, and a host interface through which the base-ASIC chip communicates with a host device;
wherein the base-ASIC chip has more processing resources than the patch-ASIC chip.
1 Assignment
0 Petitions
Accused Products
Abstract
The present invention provides methods, devices, and systems for wireless physiological sensor patches and systems which incorporate these patches. The systems and methods utilize a structure where the processing is distributed asymmetrically on the two or more types of ASIC chips that are designed to work together. The invention also relates to systems comprising two or more ASIC chips designed for use in physiological sensing wherein the ASIC chips are designed to work together to achieve high wireless link reliability/security, low power dissipation, compactness, low cost and support a variety of sensors for sensing various physiological parameters.
624 Citations
140 Claims
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1. An asymmetric system comprising:
- two or more ASIC chips wherein the chips are designed to work together to measure physiological signals, comprising;
(a) a patch-ASIC chip adapted for incorporation into a physiological signal monitoring patch comprising a sensor interface, a processor coupled to the sensor interface, a memory element coupled to the processor, a radio coupled to the memory element that transmits data to a base-ASIC chip, and power management circuits that coordinate power usage on the chip; and (b) the base-ASIC chip, comprising a processor that processes sensor data, a memory element coupled to the processor, a radio coupled to the memory element that communicates instructions to the patch-ASIC chip, power management circuits for coordinating power usage on the chip, and a host interface through which the base-ASIC chip communicates with a host device; wherein the base-ASIC chip has more processing resources than the patch-ASIC chip. - View Dependent Claims (2, 3, 6, 7, 8)
- two or more ASIC chips wherein the chips are designed to work together to measure physiological signals, comprising;
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4-5. -5. (canceled)
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9-11. -11. (canceled)
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12. A method comprising:
- monitoring a physiological condition using two or more ASIC chips and a host device wherein the chips are designed to work together to measure physiological signals comprising;
(a) receiving signals from a sensor at a patch-ASIC chip that is incorporated into a physiological signal monitoring patch, the patch-ASIC chip comprising a sensor interface coupled to the sensor, a processor coupled to the sensor interface, a memory element coupled to the processor, a radio coupled to the memory element; (b) transmitting data signals from the radio on the patch-ASIC chip through an antenna incorporated into the patch; (e) receiving the data signals at a base-ASIC chip comprising an antenna that sends the signals to a processor that processes data signals, a memory element coupled to the processor, a radio coupled to the memory element, and a host interface through which the base-ASIC chip communicates with a host device; and (d) transmitting instructions wirelessly from the base-ASIC chip to the patch-ASIC chip; wherein the base-ASIC chip consumes more power than the patch-ASIC chip.
- monitoring a physiological condition using two or more ASIC chips and a host device wherein the chips are designed to work together to measure physiological signals comprising;
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13-14. -14. (canceled)
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15. A system comprising two or more ASIC chips wherein the chips are designed to work together to measure physiological signals, comprising:
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(a) a patch-ASIC chip adapted for incorporation into a physiological signal monitoring patch comprising a sensor interface, a processor coupled to the sensor interface, a memory element coupled to the processor, a radio coupled to the memory element that transmits data to a base-ASIC chip, and power management circuits that coordinate power on the chip; and (b) the base-ASIC chip comprising a processor that processes sensor data, a memory element coupled to the processor, a radio coupled to the memory element that that transmits instructions to the patch-ASIC chip, power management circuits for coordinating power on the chip, and a host interface through which the base-ASIC chip communicates with a host device. - View Dependent Claims (16, 17, 18, 19, 21, 22, 23, 36, 37, 38)
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20. (canceled)
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24-35. -35. (canceled)
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39-40. -40. (canceled)
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41. A system comprising three or more ASIC chips wherein the chips are designed to work together to measure physiological signals, comprising:
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(a) a patch-ASIC chip adapted for incorporation into a physiological signal monitoring patch comprising a sensor interface, a processor coupled to the sensor interface, a memory element coupled to the processor, a radio coupled to the memory element that transmits sensor data to a base-ASIC chip and/or a gate-ASIC chip, and power management circuits that coordinate power on the chip; (b) the gate-ASIC chip comprising a processor that processes sensor data, a memory element coupled to the processor, a radio coupled to the processor that communicates with the patch-ASIC chip and the base-ASIC chip, and power management circuits that coordinate power on the chip; and (c) the base-ASIC chip comprising a processor that processes sensor data, a memory element coupled to the processor, a radio coupled to the memory element that that transmits instructions to the patch-ASIC chip and/or the gate-ASIC chip, power management circuits that coordinate power on the chip, and a host interface through which the base-ASIC chip communicates with a host device. - View Dependent Claims (42, 46)
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43-45. -45. (canceled)
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47-54. -54. (canceled)
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55. A patch for measuring a physiological state comprising a battery and an antenna each coupled to an integrated circuit comprising a sensor interface that receives physiological signals from a sensor, a processor coupled to the sensor interface, a memory element coupled to the processor, a radio coupled to the memory element, and power management circuits that coordinate power dissipation on the chip;
wherein the area of the patch multiplied by the thickness of the patch is less than about 30 cm3; and
wherein the patch can wirelessly transmit physiological data for at least about 2 days while monitoring a physiological signal from the patient without changing or recharging the battery.- View Dependent Claims (56, 57, 58, 59, 61, 73)
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60. (canceled)
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62-72. -72. (canceled)
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74-78. -78. (canceled)
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79. A patch for measuring a physiological state comprising a battery and an antenna each coupled to an integrated circuit comprising a sensor interface that receives physiological signals from a sensor, a processor coupled to the sensor interface, a memory element coupled to the processor, a radio coupled to the memory element, and power management circuits that coordinate power dissipation on the chip;
- wherein the patch is a cardiac patch that can measure all of ECG, SpO2, tissue impedance, accelerometer, and PT-INR signals.
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80. A patch for measuring a physiological state comprising a battery and an antenna each coupled to an integrated circuit comprising a sensor interface that receives physiological signals from a sensor, a processor coupled to the sensor interface, a memory element coupled to the processor, a radio coupled to the memory element, and power management circuits that coordinate power dissipation on the chip;
- wherein the patch is a neurological patch for measuring sleep apnea that can measure all of EEG, EMG, SpO2, heart rate, respiration rate and airflow volume, and pressure signals.
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81. A patch for measuring a physiological state comprising a battery and an antenna each coupled to an integrated circuit comprising a sensor interface that receives physiological signals from a sensor, a processor coupled to the sensor interface, a memory element coupled to the processor, a radio coupled to the memory element, and power management circuits that coordinate power dissipation on the chip;
- wherein the patch is an endocrinological patch for measuring diabetes or wounds that can measure all of ECG, blood glucose, and UWB radar signals.
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82. A patch for measuring a physiological state comprising a battery and an antenna each coupled to an integrated circuit comprising a sensor interface that receives physiological signals from a sensor, a processor coupled to the sensor interface, a memory element coupled to the processor, a radio coupled to the memory element, and power management circuits that coordinate power dissipation on the chip;
- wherein the patch is fitness and wellness patch that can measure all of ECG, heart rate, accelerometer, and pressure signals.
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83. A method comprising monitoring a physiological condition using two or more ASIC chips and a host device wherein the chips are designed to work together to measure physiological signals comprising:
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(a) receiving signals from a sensor at a patch-ASIC chip that is incorporated into a physiological signal monitoring patch, the patch-ASIC chip comprising a sensor interface coupled to the sensor, a processor coupled to the sensor interface, a memory element coupled to the processor, a radio coupled to the memory element; (b) managing the power dissipation on the patch-ASIC chip with power management circuits on the patch-ASIC chip; (c) transmitting data signals from the radio on the patch-ASIC chip through an antenna incorporated into the patch; (d) receiving the data signals at a base-ASIC chip comprising a processor that processes data signals, a memory element coupled to the processor, a radio coupled to the memory element, power management circuits that coordinate power dissipation on the base-ASIC chip, and a host interface through which the base-ASIC chip communicates with a host device; and (e) sending instructions wirelessly from the base-ASIC chip to the patch-ASIC chip such that the base-ASIC chip coordinates a function of the physiological signal monitoring patch. - View Dependent Claims (84, 85, 86, 87, 88)
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89-96. -96. (canceled)
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97. A method comprising monitoring a physiological condition using three or more ASIC chips wherein the chips are designed to work together to measure physiological signals, comprising:
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(a) receiving physiological signals from sensors at a patch-ASIC chip incorporated into a physiological signal monitoring patch, the patch-ASIC chip comprising a sensor interface, a processor coupled to the sensor interface, a memory element coupled to the processor, a radio coupled to the memory element; (b) managing power dissipation on the patch-ASIC chip with power management circuits on the patch-ASIC chip; (c) transmitting data to a base-ASIC and/or a gate-ASIC chip through an antenna in the patch; (d) receiving the data sent from the patch-ASIC chip at the gate-ASIC chip, the gate-ASIC chip comprising a processor that processes sensor data, a memory element coupled to the processor, a radio coupled to the processor that communicates with the patch-ASIC chip and the base-ASIC chip, and power management circuits for coordinating power dissipation on the gate-ASIC chip; (e) coordinating a function on the patch-ASIC chip and/or gate-ASIC chip by sending instructions from a base-ASIC chip to the patch-ASIC chip and/or the gate-ASIC chip, wherein the base-ASIC chip comprises a processor that processes sensor data, a memory element coupled to the processor, a radio coupled to the memory element, power management circuits for coordinating power dissipation on the base-ASIC chip; and (f) sending data from the base-ASIC chip to a host device through a host interface. - View Dependent Claims (98, 99)
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100-138. -138. (canceled)
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139. A method for unsupervised placement of a physiological patch comprising:
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(a) placing the patch that can receive wireless signals from a base device, wherein the patch comprises a visual marker to help the user orient the patch on the patient'"'"'s body; (b) initializing the patch with a base device by automatic verification of proper placement of the patch; and (c) indicating the proper or improper placement of the patch to the user with an audio or visual indication.
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140-142. -142. (canceled)
Specification