Method, System, and Apparatus for Dynamic Reconfiguration of Resources

• US 20090055600A1
• Filed: 09/23/2008
• Published: 02/26/2009
• Est. Priority Date: 12/13/2004
• Status: Abandoned Application

• Current Assignee: Akhiles Kumar, Eric Delano, Ioannis T. Schoinas, Jay Jayasimha, Jose A. Vargas, Mani Ayyar
• Original Assignee: Akhiles Kumar, Eric Delano, Ioannis T. Schoinas, Jay Jayasimha, Jose A. Vargas, Mani Ayyar
• Inventors: Delano, Eric, Ayyar, Mani, Schoinas, Ioannis T., Jayasimha, Jay, Vargas, Jose A., Kumar, Akhiles
• Application Number:
  US12/236,222
• Publication Number:
  US 20090055600A1
• Time in Patent Office: Days
• US Class Current: 711/153
• CPC Class Codes: G06F 13/00 Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units interface circuits for specific input/output devices G06F3/00 ; multiprogram control therefor G06F9/46; multiprocessor systems G06F15/16
• CPC Class Codes: G06F 13/24 using interrupt G06F13/32 takes precedence
• CPC Class Codes: G06F 13/4081 Live connection to bus, e.g. hot-plugging current or voltage limitation during live insertion H02H9/004
• CPC Class Codes: G06F 13/409 Mechanical coupling back panels H05K7/1438
• CPC Class Codes: G06F 9/44505 Configuring for program initiating, e.g. using registry, configuration files
• CPC Class Codes: G06F 9/50 Allocation of resources, e.g. of the central processing unit [CPU]
• CPC Class Codes: G06F 9/5011 the resources being hardware resources other than CPUs, Servers and Terminals

Abstract

A dynamic reconfiguration to include on-line addition, deletion, and replacement of individual modules of to support dynamic partitioning of a system, interconnect (link) reconfiguration, memory RAS to allow migration and mirroring without OS intervention, dynamic memory reinterleaving, CPU and socket migration, and support for global shared memory across partitions is described. To facilitate the on-line addition or deletion, the firmware is able to quiesce and de-quiesce the domain of interest so that many system resources, such as routing tables and address decoders, can be updated in what essentially appears to be an atomic operation to the software layer above the firmware.

Claims

1. A method for on-line deletion of a memory node comprising:

migrating applications and device drivers using the memory node; and

flushing pageable memory to a disk, or if enough spare memory is available, copy the memory contents of the memory node to be removed to another region of memory being removed to other memory segments.

2. The method of claim 1, wherein the memory node being removed is from a partition.

3. A method for on-line deletion of a memory node comprising:

migrating applications and device drivers using the memory node;

flushing pageable memory to a disk, or if enough spare memory is available, copy the memory contents of the memory node to be removed to another region of memory being removed to other memory segments; and

shutting down a device driver or assigning to a new buffer if the memory node being removed is assigned to a Direct Memory Access (DMA) device.

4. The method of claim 3, wherein the memory node being removed is from a partition.

5. A method for on-line deletion of a memory node comprising:

migrating applications and device drivers using the memory node;

flushing pageable memory to a disk, or if enough spare memory is available, copy the memory contents of the memory node to be removed to another region of memory being removed to other memory segments;

shutting down a device driver or assigning to a new buffer if the memory node being removed is assigned to a Direct Memory Access (DMA) device; and

a firmware flushes A processor and a plurality of platform caches for the address range defined by the memory node being removed.

6. The method of claim 5, wherein the memory node being removed is from a partition.