PARTITIONED THROUGH-LAYER VIA AND ASSOCIATED SYSTEMS AND METHODS
First Claim
1. A substrate, comprising:
- a non-conductive layer having a top side, a bottom side, and a via hole extending between the top and bottom sides and including a sidewall having a first section and a second section; and
a partitioned via including a first metal interconnect within the via hole on the first section of the sidewall and a second metal interconnect within the via hole on the second section of the sidewall, wherein the second metal interconnect is electrically isolated from the first metal interconnect.
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Accused Products
Abstract
Partitioned vias, interconnects, and substrates that include such vias and interconnects are disclosed herein. In one embodiment, a substrate has a non-conductive layer and a partitioned via formed in a portion of the non-conductive layer. The non-conductive layer includes a top side, a bottom side, and a via hole extending between the top and bottom sides and including a sidewall having a first section a second section. The partitioned via includes a first metal interconnect within the via on the first section of the sidewall and a second metal interconnect within the via hole on the second section of the sidewall and electrically isolated from the first metal interconnect. In another embodiment, the first metal interconnect is separated from the second metal interconnect by a gap within the via hole.
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Citations
34 Claims
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1. A substrate, comprising:
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a non-conductive layer having a top side, a bottom side, and a via hole extending between the top and bottom sides and including a sidewall having a first section and a second section; and a partitioned via including a first metal interconnect within the via hole on the first section of the sidewall and a second metal interconnect within the via hole on the second section of the sidewall, wherein the second metal interconnect is electrically isolated from the first metal interconnect. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A circuit board comprising a partitioned via having:
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a sidewall through a dielectric layer defining an opening; a first metal interconnect within the opening; and a second metal interconnect within the opening and electrically isolated from the first interconnect, wherein the first and second interconnects are formed from a common metal layer deposited onto the sidewall. - View Dependent Claims (12, 13, 14, 15)
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16. An interconnect system, comprising:
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a circuit board layer having a surface and a via hole that extends through the circuit board layer; a metal contact at the surface of the circuit board layer, wherein the metal contact at least partially surrounds the via hole, and the metal contact is electrically coupled to an opposing surface of the circuit board layer through the via hole and has a first portion and a second portion electrically isolated from the first portion; a first metal trace attached to the circuit board layer and coupled to the first portion of the metal contact; and a second metal trace attached to the circuit board layer and coupled to the second portion of the metal contact. - View Dependent Claims (17, 18, 19)
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20. A method for manufacturing a substrate, the method comprising:
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forming a hole through a non-conductive layer, the hole including a sidewall; depositing a conductive layer on at least a portion of the sidewall; and forming partitions within the hole that separate the conductive layer into a first interconnect within the hole and a second interconnect within the hole that is electrically isolated form the first interconnect. - View Dependent Claims (21, 22, 23, 24, 25, 26, 27, 28)
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29. A method for electrically routing component contacts of one or more electronic components using a circuit board system of one or more circuit board layers, the method comprising:
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coupling a first contact of a component to a first exposed contact of a circuit board layer associated with a circuit board system, the first exposed contact being coupled to a first signal path of the circuit board system routed through a via hole in at least one dielectric layer of the circuit board system; and coupling a second contact of the component to a second exposed contact of the circuit board layer, the second exposed contact being coupled to a second signal path of the circuit board system routed through the via hole and electrically isolated from the first signal path. - View Dependent Claims (30, 31, 32, 33, 34)
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Specification