System and Method for Providing a Fully Non-Blocking Switch in a Supernode of a Multi-Tiered Full-Graph Interconnect Architecture

• US 20090064140A1
• Filed: 08/27/2007
• Published: 03/05/2009
• Est. Priority Date: 08/27/2007
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Arimilli, Ravi K., Rajamony, Ramakrishnan, Arimilli, Lakshminarayana B.
• Granted Patent: US 8,014,387 B2
• Time in Patent Office: Days
• US Class Current: 718/100
• CPC Class Codes: G06F 15/17356 Indirect interconnection networks
• CPC Class Codes: G06F 2209/5012 Processor sets
• CPC Class Codes: G06F 9/5061 Partitioning or combining of resources
• CPC Class Codes: H04L 49/15 Interconnection of switching modules
• CPC Class Codes: H04L 49/25 Routing or path finding in a switch fabric

Abstract

A method, computer program product, and system are provided for transmitting data from a first processor of a data processing system to a second processor of the data processing system. In one or more switches, a set of virtual channels is created, the one or more switches comprising, for each processor, a corresponding switch in the one or more switches. The data is transmitted from the first processor to the second processor through a path comprising a subset of processors of a set of processors in the data processing system. In each processor of the subset of processors, the data is stored in a virtual channel of a corresponding switch before transmitting the data to a next processor. The virtual channel of the corresponding switch in which the data is stored corresponds to a position of the processor in the path through which the data is transmitted.

Claims

1. A method, in a data processing system, for transmitting data from a first processor to a second processor in a first set of processors of the data processing system, each processor in the data processing system having a switch, the method comprising:

creating a set of virtual channels in each switch;

transmitting the data from the first processor to the second processor through a path comprising a second set of processors in the data processing system; and

storing, in each processor of the second set of processors, the data in a virtual channel of a corresponding switch before transmitting the data to a next processor in a subset of processors, wherein the virtual channel of the corresponding switch in which the data is stored corresponds to a position of the processor in the path through which the data is transmitted from the first processor to the second processor.

2. The method of claim 1, wherein a number of virtual channels created in each switch is determined based on a length of a longest indirect path in the data processing system.

3. The method of claim 2, wherein the number of virtual channels created in each switch of the one or more switches is equal to a number of ports of a corresponding processor multiplied by a number of processors in the longest indirect path in the data processing system.

4. The method of claim 2, wherein the number of virtual channels created to form the set of virtual channels is hardcoded in each switch.

5. The method of claim 1, wherein a size of each virtual channel in the set of virtual channels is dynamically set by a corresponding switch.

6. The method of claim 5, wherein the size of each virtual channel in the set of virtual channels has a predetermined static size and a dynamically adjustable additional size.

7. The method of claim 1, wherein the switches are integrated into the processors of the data processing system.

8. A computer program product, for transmitting data from a first processor to a second processor in a first set of processors of a data processing system, each processor in the data processing system having a switch, comprising a computer useable medium having a computer readable program, wherein the computer readable program, when executed in a computing device, causes the computing device to:

create a set of virtual channels in each switch;

transmit the data from the first processor to the second processor through a path comprising a second set of processors in the data processing system; and

store, in each processor of the second set of processors, the data in a virtual channel of a corresponding switch before transmitting the data to a next processor in a subset of processors, wherein the virtual channel of the corresponding switch in which the data is stored corresponds to a position of the processor in the path through which the data is transmitted from the first processor to the second processor.

9. The computer program product of claim 8, wherein a number of virtual channels created in each switch is determined based on a length of a longest indirect path in the data processing system.

10. The computer program product of claim 9, wherein the number of virtual channels created in each switch is equal to a number of ports of a corresponding processor multiplied by a number of processors in the longest indirect path in the data network.

11. The computer program product of claim 9, wherein the number of virtual channels created to form the set of virtual channels is hardcoded in the switches.

12. The computer program product of claim 8, wherein a size of each virtual channel in the set of virtual channels is dynamically set by a corresponding switch.

13. The computer program product of claim 12, wherein the size of each virtual channel in the set of virtual channels has a predetermined static size and a dynamically adjustable additional size.

14. The computer program product of claim 8, wherein the switches are integrated into the processors of the data processing system.

15. A data processing system, comprising:

a first set of processors, each processor having a switch, the first set of processors further comprising a first processor and a second processor; and

a set of switches, each processor having an associated switch in the set of switches, wherein logic in the switches operate to;

create a set of virtual channels in the switches;

transmit data from the first processor to the second processor through a path comprising a second set of processors in the data processing system; and

store, in each processor of the second set of processors, the data in a virtual channel of a corresponding switch before transmitting the data to a next processor in a subset of processors, wherein the virtual channel of the corresponding switch in which the data is stored corresponds to a position of the processor in the path through which the data is transmitted from the first processor to the second processor.

16. The data processing system of claim 15, wherein a number of virtual channels created in each switch is determined based on a length of a longest indirect path in the data processing system.

17. The data processing system of claim 16, wherein the number of virtual channels created in each switch is equal to a number of ports of a corresponding processor multiplied by a number of processors in the longest indirect path in the data network.

18. The data processing system of claim 16, wherein the number of virtual channels created to form the set of virtual channels is hardcoded in the switches.

19. The data processing system of claim 15, wherein a size of each virtual channel in the set of virtual channels is dynamically set by a corresponding switch.

20. The data processing system of claim 19, wherein the size of each virtual channel in the set of virtual channels has a predetermined static size and a dynamically adjustable additional size.