WIRELESS INTERFACE PROBE CARD FOR HIGH SPEED ONE-SHOT WAFER TEST AND SEMICONDUCTOR TESTING APPARATUS HAVING THE SAME

• US 20090066350A1
• Filed: 08/28/2008
• Published: 03/12/2009
• Est. Priority Date: 09/07/2007
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: LEE, Sang-Hoon, AN, Young-Soo, OH, Se-Jang, LEE, Kwang-Yong
• Granted Patent: US 7,880,490 B2
• Time in Patent Office: Days
• US Class Current: 324/754.70
• CPC Class Codes: G01R 31/2889 Interfaces, e.g. between probe and tester G01R31/31905 and G01R1/07364 take precedence
• CPC Class Codes: G01R 31/3025 Wireless interface with the DUT

Abstract

A wireless interface probe card includes a substrate member and a transmission member. The substrate member has a plurality of probe terminals arranged at a constant pitch. The probe terminals may directly contact a plurality of pads arranged at a constant pitch on each of a plurality of semiconductor chips arranged on a wafer to perform a test of the semiconductor chips arranged on the wafer. The transmission member is arranged on the substrate member, wirelessly receives a test signal and provides the received test signal to the pads of the wafer through the probe terminals, and wirelessly and externally transmits an electrical characteristic signal provided from the pads of the wafer through the probe terminals.

Claims

1. A wireless interface probe card for a semiconductor testing apparatus, comprising:

a substrate member including a plurality of probe terminals having a predefined pitch, the probe terminals capable of directly contacting a plurality of pads, the pads having the predefined pitch, the pads being arranged on each of a plurality of semiconductor chips on a wafer to perform a test of the semiconductor chips; and

at least one transmission member constructed and arranged on the substrate member to wirelessly receive a test signal, to provide the received test signal to at least one of the pads through at least one of the probe terminals, and to wirelessly transmit electrical characteristics of at least one of the semiconductor chips received via at least one of the pads through at least one of the probe terminals.

2. The wireless interface probe card of claim 1, wherein the substrate member comprises:

a first silicon substrate having a plurality of first wiring lines arranged at a first pitch; and

a second silicon substrate having a plurality of second wiring lines arranged at a second pitch,

wherein the second silicon substrate is stacked on the first silicon substrate to form the probe terminals by electrically coupling the second wiring lines to the first wiring lines.

3. The wireless interface probe card of claim 2, wherein the first silicon substrate further comprises a plurality of first through holes penetrating the first silicon substrate, wherein the first wiring lines are respectively embedded in the first through holes, wherein the second silicon substrate further comprises a plurality of second through holes penetrating the second silicon substrate, and wherein the second wiring lines are respectively embedded in the second through holes.

4. The wireless interface probe card of claim 3, wherein the first pitch between the first wiring lines is substantially the same as the second pitch between the second wiring lines, and wherein the first wiring lines are electrically coupled to the second wiring lines, respectively.

5. The wireless interface probe card of claim 4, wherein the first pitch between the first wiring lines and the second pitch between the second wiring lines are substantially the same as the predefined pitch between the pads arranged on each of the semiconductor chips.

6. The wireless interface probe card of claim 3, wherein the first pitch between the first wiring lines is smaller than the second pitch between the second wiring lines, and wherein the first pitch is substantially the same as the predefined pitch between the pads arranged on each of the semiconductor chips.

7. The wireless interface probe card of claim 6, wherein the substrate member further comprises a plurality of third wiring lines to electrically couple the first wiring lines and the second wiring lines, wherein the third wiring lines are arranged on a surface of the first silicon substrate facing the second silicon substrate, and directly coupled to the first wiring lines of the first silicon substrate and the second wiring lines of the second silicon substrate.

8. The wireless interface probe card of claim 6, wherein the substrate member further comprises a plurality of third wiring lines to electrically couple the first wiring lines and the second wiring lines, wherein the third wiring lines are arranged on a surface of the second silicon substrate facing the first silicon substrate, and directly coupled to the first wiring lines of the first silicon substrate and the second wiring lines of the second silicon substrate.

9. The wireless interface probe card of claim 1, wherein the at least one transmission member comprises:

a plurality of transceivers arranged on the substrate member respectively corresponding to the probe terminals; and

a plurality of antennas arranged on the substrate member, each antenna corresponding to one of the transceivers, each antenna configured to receive the test signal and to provide the received test signal to the corresponding transceiver, and to externally transmit the electrical characteristics of at least one of the semiconductor chips received via at least one of the pads through at least one of the probe terminals.

10. The wireless interface probe card of claim 9, wherein each of the transceivers comprises:

a receiving portion that comprises;

a first filter configured to filter the test signal received by at least one of the antennas;

a first amplifier configured to amplify an output signal of the first filter; and

a demodulator configured to demodulate an output signal of the first amplifier and to provide the demodulated output signal to at least one of the probe terminals; and

a transmission portion that comprises;

a modulator configured to modulate the electrical characteristics of at least one of the semiconductor chips;

a second filter configured to filter an output signal of the modulator; and

a second amplifier configured to amplify an output signal of the second filter and to provide the amplified output signal to at least one of the antennas.

11. The wireless interface probe card of claim 10, wherein each of the transceivers further comprises:

a first duplexer configured to transfer an output signal of the demodulator to at least one of the probe terminals during a receiving operation, and to transfer the electrical characteristics of at least one of the semiconductor chips from at least one of the probe terminals to the modulator during a transmission operation; and

a second duplexer configured to transfer the test signal from at least one of the antennas to the first filter during the receiving operation, and to transfer an output signal of the second amplifier to at least one of the antennas during the transmission operation.

12. A semiconductor testing apparatus comprising:

a tester head configured to provide a test signal to each of a plurality of pads arranged at a constant pitch on each of a plurality of semiconductor chips arranged on a wafer, and to determine whether any of the semiconductor chips are defective by receiving electrical characteristics of the semiconductor chips via the pads;

a wireless interface probe card comprising a substrate member having a plurality of probe terminals arranged at the constant pitch, the probe terminals capable of directly contacting the pads arranged at the constant pitch on each of the semiconductor chips arranged on the wafer to perform a test of the semiconductor chips arranged on the wafer, and a transceiver member arranged on the substrate member to wirelessly receive the test signal, to provide the received test signal to the pads through the probe terminals, and to wirelessly transmit the electrical characteristics of the semiconductor chips received via the pads; and

a wireless interface card configured to receive the test signal from the tester head, to wirelessly transmit the received test signal to the transceiver member of the probe card, and to wirelessly receive the electrical characteristics of the semiconductor chips from the transceiver member of the interface probe card.

13. The semiconductor testing apparatus of claim 12, wherein the substrate member comprises:

a first silicon substrate having a plurality of first wiring lines arranged at a first pitch; and

a second silicon substrate having a plurality of second wiring lines arranged at a second pitch,

wherein the second silicon substrate is stacked on the first silicon substrate to form the probe terminals by electrically coupling the second wiring lines to the first wiring lines.

14. The semiconductor testing apparatus of claim 13, wherein the first pitch between the first wiring lines is substantially the same as the second pitch between the second wiring lines, and wherein the first wiring lines are electrically coupled to the second wiring lines, respectively.

15. The semiconductor testing apparatus of claim 13, wherein the first pitch between the first wiring lines and the second pitch between the second wiring lines are substantially the same as the constant pitch between the pads arranged on each of the semiconductor chips.

16. The semiconductor testing apparatus of claim 15, wherein the substrate member further comprises a plurality of third wiring lines to electrically couple the first wiring lines and the second wiring lines, wherein the third wiring lines are arranged on a surface of the first silicon substrate facing the second silicon substrate, and directly coupled to the first wiring lines of the first silicon substrate and the second wiring lines of the second silicon substrate.

17. The semiconductor testing apparatus of claim 12, wherein the transceiver member comprises:

a plurality of transceivers arranged on the substrate member respectively corresponding to the probe terminals and having a transmission portion to transmit the electrical characteristics of the semiconductor chips, and a receiving portion to receive the test signal and to provide the received test signal to the probe terminals; and

a plurality of antennas arranged on the substrate member, the antennas configured to receive the test signal, to provide the received test signal to the transceivers, and to externally transmit the electrical characteristics of the semiconductor chips.

18. The semiconductor testing apparatus of claim 17, wherein each of the transceivers comprises:

a receiving portion that comprises;

a first filter configured to filter the test signal received by at least one of the antennas;

a first amplifier configured to amplify an output signal of the first filter; and

a demodulator configured to demodulate an output signal of the first amplifier and to provide the demodulated output signal to at least one of the probe terminals; and

a transmission portion that comprises;

a modulator configured to modulate the electrical characteristics of at least one of the semiconductor chips;

a second filter configured to filter an output signal of the modulator; and

a second amplifier configured to amplify an output signal of the second filter and to provide the amplified output signal to at least one of the antennas;

a first duplexer configured to transfer an output signal of the demodulator to at least one of the probe terminals during a receiving operation, and to transfer the electrical characteristics of at least one of the semiconductor chips from at least one of the probe terminals to the modulator during a transmission operation; and

a second duplexer configured to transfer the test signal from at least one of the antennas to the first filter during the receiving operation, and to transfer an output signal of the second amplifier to at least one of the antennas during the transmission operation.

19. The semiconductor testing apparatus of claim 12, wherein the wireless interface card comprises:

a substrate member having a plurality of wiring lines arranged at the constant pitch;

a plurality of transceivers arranged on the substrate member respectively corresponding to the transceivers of the probe card and having a transmission portion to transmit the electrical characteristics wirelessly received from the transceivers of the probe card to the tester head, to receive the test signal from the tester head, and to wirelessly transmit the received test signal to the transceivers of the probe card; and

a plurality of antennas arranged on the substrate member, each antenna corresponding to one of the transceivers.

20. A semiconductor testing system comprising:

a tester head configured to provide a test signal;

a wireless interface card electrically coupled to the tester head, the wireless interface card configured to receive the test signal and to wirelessly transmit the test signal;

a wireless interface probe card having a plurality of probe terminals coupled to pads of a plurality of semiconductor chips, the wireless interface probe card configured to wirelessly transmit electrical characteristics of the semiconductor chips to the wireless interface card responsive to the test signal.