QUADRATURE-INPUT, QUADRATURE-OUTPUT, DIVIDER AND PHASE LOCKED LOOP, FREQUENCY SYNTHESISER OR SINGLE SIDE BAND MIXER

• US 20090068975A1
• Filed: 09/10/2007
• Published: 03/12/2009
• Est. Priority Date: 09/10/2007
• Status: Active Grant

• Current Assignee: Hong Kong University of Science and Technology
• Original Assignee: Hong Kong University of Science and Technology
• Inventors: Luong, Howard Cam, Zheng, Hui
• Granted Patent: US 8,140,039 B2
• Time in Patent Office: Days
• US Class Current: 455/325
• CPC Class Codes: H03B 19/00 Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source transference of modulation from one carrier to another H03D7/00
• CPC Class Codes: H03B 27/00 Generation of oscillations providing a plurality of outputs of the same frequency but differing in phase, other than merely two anti-phase outputs
• CPC Class Codes: H03K 3/356139 with synchronous operation
• CPC Class Codes: H03L 7/18 using a frequency divider or counter in the loop H03L7/20, H03L7/22 take precedence

Abstract

The present invention relates to a quadrature divider which may be used in a phase locked loop or frequency synthesiser or with a single side band mixer. According to a preferred embodiment the divider takes a quadrature input and has a quadrature output. The divider has four analog mixers 1, 2, 3 and 4. The first two mixers 1, 2 take the in-phase quadrature input, while the second mixers 3, 4 take the quadrature-phase quadrature input. The outputs and feedback loops of the mixers are properly arranged such that the in-phase and quadrature-phase outputs of the divider have a determinisitic phase sequence relationship based on the phase sequence relationship of the corresponding quadrature inputs. Third order harmonics may be minimised or reduced by addition or subtraction of the mixer outputs. As the divider is able to take a quadrature input, there is no need for a dummy divider in the phase locked loop, thus saving space and power.

Claims

1. A quadrature-input quadrature-output divider comprising:

a) an in-phase input for receiving an in-phase input signal

b) a quadrature-phase input for receiving a quadrature phase input signal;

c) an in-phase output for outputting an in-phase signal;

d) a quadrature-phase output for outputting a quadrature-phase signal; and

e) first, second, third and fourth analog mixers, each having first and second inputs and an output;

wherein the first input of the first analog mixer is arranged to receive the in-phase input signal;

the first input of the second analog mixer is arranged to receive the in-phase input signal;

the first input of the third analog mixer is arranged to receive the quadrature-phase input;

the first input of the fourth analog mixer is arranged to receive the quadrature-phase input signal; and

wherein, the output of the first mixer is fed back to the second input of the first mixer;

the output of the second mixer is fed back to the second input of the second mixer;

wherein the signal input to one of the first and second inputs of the second mixer is phase shifted by 180 degrees;

wherein the output of the third mixer is tied together with the output of the first mixer and the combined signal from the first and third mixers is directed to the in-phase output of the divider, and fed back to the second input of the fourth mixer; and

the output of the fourth mixer is combined with the output of the second mixer and the combined output of the second and fourth mixers is directed to the quadrature-phase output of the divider, and fed-back to the second input of the third mixer.

2. A divider as claimed in claim 1 wherein there is an inverter between the in-phase input and the first input of the second mixer.

3. A divider as claimed in claim 1 wherein there is an inverter on a path between the output of the second mixer and the second input of the second mixer.

4. A divider as claimed in claim 1 wherein said inputs and outputs of the mixers are differential inputs and outputs and wherein said in-phase and quadrature-phase inputs and outputs of the divider are differential inputs and outputs.

5. A divider as claimed in claim 4 wherein the differential output of the second mixer is cross-coupled to the second differential input of the second mixer.

6. A divider as claimed in claim 4 wherein the differential in-phase input of the divider is cross-coupled to the first differential input of the second mixer.

7. A divider as claimed in claim 1 wherein the mixers are Gilbert-Cell mixers.

8. A divider as claimed in claim 4 wherein the mixers are differential Gilbert-Cell mixers.

9. A divider as claimed in claim 7 wherein the Gilbert-Cell mixers each have a bottom transistor and a pair of switching transistors.

10. A divider as claimed in claim 9 wherein quadrature-phase and in-phase inputs are coupled to the bottom transistors of the mixers and the quadrature-phase and in-phase outputs are coupled to the bottom transistors of the mixers.

11. A divider as claimed in claim 9 wherein quadrature-phase and in-phase inputs are coupled to the switching transistors of the mixers and the quadrature-phase and in-phase outputs are coupled to the bottom transistors of the mixers.

12. A divider as claimed in claim 9 wherein the bottom transistors of the first and second mixers are combined and/or the bottom transistors of the third and fourth mixers are combined.

13. A phase locked loop or synthesiser comprising a voltage controlled oscillator (VCO) and a feedback loop;

wherein the phase locked loop or synthesiser is configured to output a quadrature signal and wherein the feedback loop comprises one or more quadrature-input quadrature-output dividers.

14. The phase locked loop or synthesiser of claim 13, wherein the quadrature-input quadrature-output divider(s) is (are):

a) an in-phase input for receiving an in-phase input signal

b) a quadrature-phase input for receiving a quadrature phase input signal;

c) an in-phase output for outputting an in-phase signal;

d) a quadrature-phase output for outputting a quadrature-phase signal; and

e) first, second, third and fourth analog mixers, each having first and second inputs and an output;

wherein the first input of the first analog mixer is arranged to receive the in-phase input signal;

the first input of the second analog mixer is arranged to receive the in-phase input signal;

the first input of the third analog mixer is arranged to receive the quadrature-phase input;

the first input of the fourth analog mixer is arranged to receive the quadrature-phase input signal; and

wherein, the output of the first mixer is fed back to the second input of the first mixer;

the output of the second mixer is fed back to the second input of the second mixer;

wherein the signal input to one of the first and second inputs of the second mixer is phase shifted by 180 degrees;

wherein the output of the third mixer is tied together with the output of the first mixer and the combined signal from the first and third mixers is directed to the in-phase output of the divider, and fed back to the second input of the fourth mixer; and

the output of the fourth mixer is combined with the output of the second mixer and the combined output of the second and fourth mixers is directed to the quadrature-phase output of the divider, and fed-back to the second input of the third mixer

15. The phase locked loop or synthesiser of claim 13 wherein the VCO is a quadrature VCO which outputs a quadrature signal.

16. The phase locked loop or synthesiser of claim 13 wherein the VCO output is coupled to a quadrature signal generator and wherein the output of the quadrature signal generator is coupled to the output of the phase locked loop or synthesiser and to the quadrature-input quadrature-output divider of the feed back loop.

17. A circuit comprising a single side band (SSB) mixer and a quadrature input quadrature output (QIQO) divider;

wherein the SSB has a first quadrature input adapted to receive a first quadrature signal and a second quadrature input adapted to receive a second quadrature signal;

wherein the circuit is arranged such that said first quadrature signal is input to both the first quadrature input of the SSB and the quadrature input of the QIQO divider and wherein the quadrature output of the QIQO divider forms the second quadrature signal which is input to the second quadrature input of the SSB.

18. A circuit according to claim 17, wherein the QIQO divider is a divider including:

a) an in-phase input for receiving an in-phase input signal

b) a quadrature-phase input for receiving a quadrature phase input signal;

c) an in-phase output for outputting an in-phase signal;

d) a quadrature-phase output for outputting a quadrature-phase signal; and

e) first, second, third and fourth analog mixers, each having first and second inputs and an output;

wherein the first input of the first analog mixer is arranged to receive the in-phase input signal;

the first input of the second analog mixer is arranged to receive the in-phase input signal;

the first input of the third analog mixer is arranged to receive the quadrature-phase input;

the first input of the fourth analog mixer is arranged to receive the quadrature-phase-input signal; and

wherein, the output of the first mixer is fed back to the second input of the first mixer;

the output of the second mixer is fed back to the second input of the second mixer;

wherein the signal input to one of the first and second inputs of the second mixer is phase shifted by 180 degrees;

wherein the output of the third mixer is tied together with the output of the first mixer and the combined signal from the first and third mixers is directed to the in-phase output of the divider, and fed back to the second input of the fourth mixer; and

the output of the fourth mixer is combined with the output of the second mixer and the combined output of the second and fourth mixers is directed to the quadrature-phase output of the divider, and fed-back to the second input of the third mixer.