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Three dimensional memory in a system on a chip

  • US 20090070721A1
  • Filed: 09/12/2008
  • Published: 03/12/2009
  • Est. Priority Date: 09/12/2007
  • Status: Active Grant
First Claim
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1. A system for organizing multilayer integrated circuit (IC) memory components in a 3D system on a chip (SoC), comprising:

  • memory components on a layer of a multilayer IC;

    wherein the memory components are used by microprocessors, FPGAs or ASICs; and

    wherein when the memory components store data and instructions, they are accessed by the logic devices.

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