METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE OBTAINED BY MEANS OF SAID METHOD

• US 20090072351A1
• Filed: 04/28/2006
• Published: 03/19/2009
• Est. Priority Date: 05/03/2005
• Status: Active Grant

• Current Assignee: NXP B.V. (NXP Semiconductors NV)
• Original Assignee: NXP B.V. (NXP Semiconductors NV)
• Inventors: Sonsky, Jan, Meunier-Beillard, Philippe
• Granted Patent: US 7,825,011 B2
• Time in Patent Office: Days
• US Class Current: 257/615
• CPC Class Codes: H01L 21/76264 SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
• CPC Class Codes: H01L 29/1054 with a variation of the composition, e.g. channel with strained layer for increasing the mobility
• CPC Class Codes: H01L 29/66575 where the source and drain or source and drain extensions are self-aligned to the sides of the gate H01L29/66606 takes precedence
• CPC Class Codes: H01L 29/78 with field effect produced by an insulated gate H01L29/7725, H01L29/775, H01L29/778 take precedence

Abstract

The invention relates to a method of manufacturing a semiconductor device (10) comprising a substrate (11) and a semiconductor body (12) in which at least one semiconductor element (1) is formed, wherein on the substrate (11) a semiconductor layer (2) is formed comprising a mixed crystal of silicon and germanium, further called the silicon-germanium layer (2) and having a lower surface close to the substrate (11) and an upper surface more remote from the substrate (11), and wherein the silicon-germanium layer (2) is subjected to an oxidizing treatment at a surface of the silicon-germanium layer (2) while the other surface of the silicon-germanium layer (2) is protected against the oxidizing treatment by a blocking layer (3). According to the invention, the blocking layer (3) is formed on the upper surface of the silicon-germanium layer (2), a cavity (5) is formed in the semiconductor body below the silicon-germanium layer (2) and the lower surface of the silicon-germanium layer (2) is subjected to the oxidizing treatment through the cavity (2). In this way, a device 10 may be obtained in which the surface of the silicon-germanium layer (2) after the oxidizing treatment does not suffer from roughening and/or germanium pile up. This enables e.g. to manufacture in particular a MOSFET on top of or in the silicon-germanium layer (2) with excellent properties and high yield.

Claims

1. A method of manufacturing a semiconductor device comprising a substrate and a semiconductor body in which at least one semiconductor element is formed, wherein on the substrate a semiconductor layer is formed comprising a mixed crystal of silicon and germanium, further called the silicon-germanium layer and having a lower surface close to the substrate and an upper surface more remote from the substrate, and wherein the silicon-germanium layer is subjected to an oxidizing treatment at a surface of the silicon-germanium layer while the other surface of the silicon-germanium layer is protected against the oxidizing treatment by a blocking layer, characterized in that the blocking layer is formed on the upper surface of the silicon-germanium layer, a cavity is formed in the semiconductor body below the silicon-germanium layer and the lower surface of the silicon-germanium layer is subjected to the oxidizing treatment through the cavity.

2. A method according to claim 1, characterized in that a hole is etched in the silicon-germanium layer with a depth greater than the thickness of the silicon-germanium layer and the cavity is formed by under etching material below the silicon-germanium layer with a selective etching agent.

3. A method according to claim 1, characterized in that for the substrate a silicon substrate is chosen and the silicon-germanium layer is formed by epitaxy.

4. A method according to claim 3, characterized in that a further silicon-germanium layer is formed below the silicon-germanium layer and which is separated from the silicon-germanium layer by a silicon layer.

5. A method according to claim 4, characterized in that the silicon-germanium layer is provided with a thickness larger than the thickness of the further silicon-germanium layer.

6. A method according to claim 3, characterized in that in the silicon substrate an insulating layer is formed below a thin surface layer of silicon.

7. A method according to claim 1, characterized in that for the semiconductor element a field effect transistor is chosen.

8. A method according to claim 7, characterized in that the channel region of the field effect transistor is formed by the silicon-germanium layer.

9. A method according to claim 7, characterized in that the field effect transistor is formed before formation of the cavity.

10. A method according to claim 7, characterized in that a thin silicon layer is formed on top of the silicon-germanium layer.

11. A method according to claim 7, characterized in that a III-V layer is formed on top of the silicon-germanium layer.

12. A method according to claim 1, characterized in that after the oxidizing treatment the cavity is filled by polycrystalline or amorphous silicon.

13. A method according to claim 1, characterized in that the at least one semiconductor element forms a CMOS circuit.

14. A method according to claim 1, characterized in that for the blocking layer a layer of silicon nitride is chosen.

15. A method according to claim 1, characterized in that for the oxidizing treatment an oxidation in an oxygen containing atmosphere at a temperature higher than 1000°

C. is chosen.

16. A semiconductor device obtained by a method according to claim 1.