System for transferring information and method thereof

• US 20090077303A1
• Filed: 04/11/2008
• Published: 03/19/2009
• Est. Priority Date: 09/19/2007
• Status: Abandoned Application

• Current Assignee: Universal Scientific Industrial Co., Ltd. (ASE Technology Holding Co., Ltd.)
• Original Assignee: Universal Scientific Industrial Co., Ltd. (ASE Technology Holding Co., Ltd.)
• Inventors: Peng, Yifu, Ao, Qingyun, Dai, Guangcheng
• Application Number:
  US12/081,144
• Publication Number:
  US 20090077303A1
• Time in Patent Office: Days
• US Class Current: 711/103
• CPC Class Codes: G06F 13/4234 being a memory bus

Abstract

A system for transferring information and method thereof, the system includes a management processor, a storage processor and a peripheral. Moreover, the management processor connects to the storage processor by I2C bus and GPIO bus, wherein the I2C bus is used for transmitting information from the management processor to the storage processor, and the GPIO bus is used for transmitting acknowledged instruction from the storage processor to the management processor. Moreover, the management processor transmits the information to the storage processor continuously until the management processor receives an acknowledged instruction from the storage processor. Furthermore, the storage processor waits to receive the information from the management processor, and replies the acknowledged instruction to the management processor after the storage processor receives the information correctly.

Claims

1. A system for transferring information, comprising:

a management processor;

a storage processor;

an Internal Integrated Circuit (I2C) bus, connected between the management processor and the storage processor, in which the I2C bus is used for providing information transfer between the management processor and the storage processor; and

a General Purpose Input/Output (GPIO) bus, connected between the management processor and the storage processor, in which the GPIO bus is used for providing the transmission of acknowledged instruction of the reception of information between the management processor and the storage processor.

2. The system for transferring information according to claim 1, further including a peripheral component, the peripheral component being connected to the management processor through a transfer interface, and the peripheral component storing information to be transferred.

3. The system for transferring information according to claim 2, wherein the peripheral component is a non-volatile memory (e.g. EEPROM).

4. The system for transferring information according to claim 3, wherein the transfer interface is a local bus or an Internal Integrated Circuit (I2C) bus.

5. The system for transferring information according to claim 2, further including a first flash memory, wherein the first flash memory is connected to the management processor for holding a management operating system.

6. The system for transferring information according to claim 5, further including a second flash memory, wherein the second flash memory is connected the storage processor for holding a storage operating system.

7. A method for transferring information, the steps thereof including:

(a) initializing a management processor, turning it into an I2C bus controlling element;

(b) initializing a storage processor, turning it into an I2C bus controlled element, and initializing a local variable of the storage processor;

(c) the management processor writing information to the storage processor through an I2C bus through an Internal Integrated Circuit (I2C) bus; and

(d) the management processor determining whether the storage processor has successfully received the information through a General Purpose Input/Output (GPIO) bus.

8. The method for transferring information according to claim 7, before step (a) further including a step of loading a management operating system into the management processor.

9. The method for transferring information according to claim 8, before step (b), further including a step of loading a storage operating system into the storage processor.

10. The method for transferring information according to claim 9, in step (c), the management processor reading the information from a peripheral component and writing the information into the storage processor through the I2C bus.

11. The method for transferring information according to claim 10, after step (c), further including step (c1) of the storage processor deciding whether the information stored by the local variable is valid.

12. The method for transferring information according to claim 11, after step (c1) the storage processor inquiring a register in the I2C bus, and reading the new information in the register into the local variable, then returning to step (c1), if the information stored by the local variable is invalid.

13. The method for transferring information according to claim 11, after step (c1) the storage processor notifying the management processor through the GPIO bus that the information has been successful received, and continuing the execution of subsequent logics, if the information stored by the local variable is valid.

14. The method for transferring information according to claim 10, after step (d) the management processor keeping writing the information to the storage processor if the storage processor has not yet received the information;

contrarily, if the information has been successfully received, the management processor continuing the execution of its subsequent logics.

15. The method for transferring information according to claim 14, wherein the information is a World Wide Name (WWN), a Media Access Control (MAC) address, an identification data or other information, and the information further includes a verification code.